Patents by Inventor Yoshizo OSUMI

Yoshizo OSUMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112995
    Abstract: A semiconductor device includes a first die pad with a first obverse surface facing in z direction, a second die pad spaced from the first die pad and including a second obverse surface facing in z direction, a first semiconductor element on the first obverse surface, a second semiconductor element on the second obverse surface, an insulating element on the first or second obverse surface and located between the first and second semiconductor elements in x direction to relay signals between the first and second semiconductor elements while electrically insulating these semiconductor elements, and a wire bonded to the first semiconductor element and the first obverse surface. The first die pad includes a first bond portion bonded to the wire, and a first opening located between the first bond portion and the first semiconductor element in y direction and including an opening end in the first obverse surface.
    Type: Application
    Filed: November 29, 2021
    Publication date: April 4, 2024
    Inventors: Moe YAMAGUCHI, Hiroaki MATSUBARA, Yoshizo OSUMI, Tomohira KIKUCHI, Ryohei UMENO, Taro NISHIOKA
  • Patent number: 11923277
    Abstract: A semiconductor device includes a conductive support member, a first semiconductor element, and a second semiconductor element. The conductive support member includes a first die pad and a second die pad separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. The first die pad has a first main surface mounting the first semiconductor element, and a first back surface opposing the first main surface. The second die pad has a second main surface mounting the second semiconductor element, and a second back surface opposing the second main surface. When viewed along a second direction, a distance in the first direction between the first back surface and the second back surface is larger than a distance in the first direction between the first main surface and the second main surface.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: March 5, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yoshizo Osumi, Hiroaki Matsubara, Tomohira Kikuchi
  • Publication number: 20240047438
    Abstract: A semiconductor device includes first and second semiconductor elements, and first and second circuits at different potentials. The second semiconductor element, electrically connected to the first semiconductor element, relays mutual signals between the first and the second circuits, while insulating them. The semiconductor device further includes a first terminal lead electrically connected to the first semiconductor element, a first wire connected to the first and the second semiconductor elements, and a second wire connected to the first semiconductor element and the first terminal lead. The first wire contains a first metal. The second wire includes a first core containing a second metal, and a first surface layer containing a third metal and covering the first core. The second metal has a smaller atomic number than that of the first metal. The third metal has a greater bonding strength with respect to the first terminal lead than the second metal.
    Type: Application
    Filed: November 22, 2021
    Publication date: February 8, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Hiroaki MATSUBARA, Taro NISHIOKA, Yoshizo OSUMI, Tomohira KIKUCHI, Moe YAMAGUCHI, Ryohei UMENO
  • Patent number: 11894321
    Abstract: A semiconductor device includes a conductive support member, a first semiconductor element, a second semiconductor element, an insulating element, and a sealing resin. The conductive support member includes a first die pad and a second die pad, which are separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. When viewed along a thickness direction, a peripheral edge of the first die pad has a first near-angle portion including a first end portion in a second direction orthogonal to both the thickness direction and the first direction. The first near-angle portion is separated from the second die pad in the first direction toward the first end portion in the second direction.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: February 6, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yoshizo Osumi, Hiroaki Matsubara, Tomohira Kikuchi
  • Publication number: 20240030105
    Abstract: A semiconductor device includes: a first die pad; a second die pad; a first semiconductor element on the first die pad; a second semiconductor element on the second die pad; an insulating element electrically connected to the first semiconductor element and the second semiconductor element and electrically insulating the first and second semiconductor elements from each other; a sealing resin covering the first semiconductor element, the second semiconductor element and the insulating element; and a support member on which the insulating element is mounted, where the support member includes an insulating portion containing a resin. The first die pad and the second die pad are spaced apart from each other in a first direction orthogonal to a thickness direction of the first semiconductor element. The support member is supported by at least one of the first die pad, the second die pad and the sealing resin.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Inventors: Yoshizo OSUMI, Yasushi HAMAZAWA, Tomohira KIKUCHI
  • Publication number: 20240030109
    Abstract: A semiconductor device includes: a plurality of conductive members including a first die pad and a second die pad that are spaced apart from each other; a first semiconductor element mounted on the first die pad; a second semiconductor element mounted on the second die pad; and an insulator that is electrically connected to the first semiconductor element and the second semiconductor element, and that insulates the first semiconductor element and the second semiconductor element from each other. The plurality of conductive members include a third die pad spaced apart from the first die pad and the second die pad. The insulator is mounted on the third die pad.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 25, 2024
    Inventors: Yoshizo OSUMI, Taro NISHIOKA, Hiroaki MATSUBARA
  • Publication number: 20240030212
    Abstract: A semiconductor device includes a semiconductor control element, a first drive element, a second drive element and a first insulating element. The first drive element is spaced apart from the semiconductor control element in a first direction orthogonal to a thickness direction of the semiconductor control element and receives a signal transmitted from the semiconductor control element. The second drive element is spaced apart from the first drive element in a second direction orthogonal to the thickness direction and the first direction and receives a signal transmitted from the semiconductor control element. The first insulating element is located between the semiconductor control element and the first drive element in the first direction. The first insulating element relays a signal transmitted from the semiconductor control element to the first drive element and provides electrical insulation between the semiconductor control element and the first drive element.
    Type: Application
    Filed: July 14, 2023
    Publication date: January 25, 2024
    Inventors: Tomohira KIKUCHI, Hiroaki MATSUBARA, Yoshizo OSUMI, Moe YAMAGUCHI, Ryohei UMENO
  • Publication number: 20240014107
    Abstract: A semiconductor device includes a plurality of conductive members including a die pad, a first semiconductor element and a second semiconductor element each located on the die pad, an insulating element electrically connected to the first semiconductor element and the second semiconductor element and insulating the first semiconductor element and the second semiconductor element from each other, and an insulating substrate interposed between the die pad and the insulating element and bonded to the die pad. The insulating element is bonded to the insulating substrate.
    Type: Application
    Filed: September 19, 2023
    Publication date: January 11, 2024
    Inventors: Yoshizo OSUMI, Hiroaki MATSUBARA, Tomohira KIKUCHI, Taro NISHIOKA
  • Publication number: 20240006274
    Abstract: A semiconductor device includes: conductive members including first and second members; a first semiconductor element electrically connected to one conductive member; a second semiconductor element electrically connected to one conductive member configured to receive input of a voltage different from that applied to the first semiconductor element; and a sealing resin covering a part of each conductive member, the first semiconductor element, and the second semiconductor element. The voltage applied to the second member differs from the voltage applied to the first member. The sealing resin contains electrically insulating fillers. When a square cross section having a side length equal to ? of a minimum spacing between two adjacent conductive members is hypothetically defined in the sealing resin, eight or more of the fillers each having a particle size equal to or greater than ? of the minimum spacing are at least partially contained in the square cross section.
    Type: Application
    Filed: September 12, 2023
    Publication date: January 4, 2024
    Inventors: Ryohei UMENO, Hiroaki MATSUBARA, Yoshizo OSUMI, Tomohira KIKUCHI, Moe YAMAGUCHI
  • Publication number: 20230402354
    Abstract: A semiconductor device includes a conductive support member with first and second die pads, a first semiconductor element on the first die pad, a second semiconductor element on the second die pad for forming a first output-side circuit, and a sealing resin. The first semiconductor element includes a circuit part forming an input-side circuit, and an insulating part that transmits a signal between the input-side and the first output-side circuits, while providing electrical insulation between the input-side and the first output-side circuits. The sealing resin includes first and second side faces spaced apart in an x direction and a third side face perpendicular to a y direction. The conductive support member includes input-side terminals protruding from the first side face and first output-side terminals protruding from the second side face. The conductive support member is not exposed on the third side face.
    Type: Application
    Filed: October 1, 2021
    Publication date: December 14, 2023
    Inventors: Hiroaki MATSUBARA, Yoshizo OSUMI, Tomohira KIKUCHI, Shingo MATSUMARU
  • Publication number: 20230386983
    Abstract: A semiconductor device includes first and second semiconductor elements, a conductive support, a third semiconductor element and a sealing resin. The conductive support includes first and second leads spaced apart in a first direction. The first semiconductor element is supported by the first lead. The second semiconductor element is supported by the second lead. The third semiconductor element, supported by the conductive support, insulates the first semiconductor element and the second semiconductor element. The sealing resin covers a part of the conductive support. A distance d1 between the first lead and the second lead in the first direction is greater than distance d0 given by Equation below. In Equation below, Y is the number of years of insulation life (years) expected for the semiconductor device, A and B are constants determined by a material of the sealing resin, and X is a voltage (kVrms). d ? 0 = Y A B × 0.
    Type: Application
    Filed: August 14, 2023
    Publication date: November 30, 2023
    Inventors: Yoshizo OSUMI, Taro NISHIOKA, Tomohira KIKUCHI, Kenji FUJII, Hiroaki MATSUBARA
  • Publication number: 20230343684
    Abstract: A semiconductor device includes a semiconductor control element, a first drive element, a second drive element, a first insulating element and a second insulating element. In plan view, the first drive element and the second drive element are located on the opposite sides with respect to the semiconductor control element. The first insulating element is located between the semiconductor control element and the first drive element, relays a signal transmitted from the semiconductor control element to the first drive element, and provides electrical insulation between the semiconductor control element and the first drive element. The second insulating element is located between the semiconductor control element and the second drive element, relays a signal transmitted from the semiconductor control element to the second drive element, and provides electrical insulation between the semiconductor control element and the second drive element.
    Type: Application
    Filed: June 28, 2023
    Publication date: October 26, 2023
    Inventors: Tomohira KIKUCHI, Hiroaki MATSUBARA, Yoshizo OSUMI, Moe YAMAGUCHI, Ryohei UMENO
  • Patent number: 11798870
    Abstract: There is provided a semiconductor device including: a conductive support including a first die pad and a second die pad having a potential different from a potential of the first die pad; a first semiconductor element mounted on the first die pad; a second semiconductor element mounted on the second die pad; and a sealing resin that covers the first semiconductor element, the second semiconductor element, and at least a portion of the conductive support.
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: October 24, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Yoshizo Osumi, Hiroaki Matsubara, Tomohira Kikuchi
  • Publication number: 20230335529
    Abstract: A semiconductor device includes: a semiconductor element; an island lead on which the semiconductor element is mounted; a terminal lead electrically connected to the semiconductor element; a wire connected to the semiconductor element and the terminal lead; and a sealing resin covering the semiconductor element, the island lead, the terminal lead, and the wire. The terminal lead includes a base member having an obverse surface facing in a thickness direction of the terminal lead, and a metal layer located between the obverse surface and the wire. The base member has a greater bonding strength with respect to the sealing resin than the metal layer. The obverse surface includes an opposing side facing the island lead. The obverse surface includes a first portion that includes at least a portion of the opposing side and that is exposed from the metal layer.
    Type: Application
    Filed: June 23, 2023
    Publication date: October 19, 2023
    Inventors: Ryohei UMENO, Taro NISHIOKA, Hiroaki MATSUBARA, Yoshizo OSUMI, Tomohira KIKUCHI, Moe YAMAGUCHI
  • Publication number: 20220102252
    Abstract: There is provided a semiconductor device including: a conductive support including a first die pad and a second die pad having a potential different from a potential of the first die pad; a first semiconductor element mounted on the first die pad; a second semiconductor element mounted on the second die pad; and a sealing resin that covers the first semiconductor element, the second semiconductor element, and at least a portion of the conductive support.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 31, 2022
    Inventors: Yoshizo OSUMI, Hiroaki MATSUBARA, Tomohira KIKUCHI
  • Publication number: 20220077082
    Abstract: A semiconductor device includes a conductive support member, a first semiconductor element, a second semiconductor element, an insulating element, and a sealing resin. The conductive support member includes a first die pad and a second die pad, which are separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. When viewed along a thickness direction, a peripheral edge of the first die pad has a first near-angle portion including a first end portion in a second direction orthogonal to both the thickness direction and the first direction. The first near-angle portion is separated from the second die pad in the first direction toward the first end portion in the second direction.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 10, 2022
    Inventors: Yoshizo OSUMI, Hiroaki MATSUBARA, Tomohira KIKUCHI
  • Publication number: 20220077037
    Abstract: A semiconductor device includes a conductive support member, a first semiconductor element, and a second semiconductor element. The conductive support member includes a first die pad and a second die pad separated from each other in a first direction. The first die pad and the second die pad overlap each other when viewed along the first direction. The first die pad has a first main surface mounting the first semiconductor element, and a first back surface opposing the first main surface. The second die pad has a second main surface mounting the second semiconductor element, and a second back surface opposing the second main surface. When viewed along a second direction, a distance in the first direction between the first back surface and the second back surface is larger than a distance in the first direction between the first main surface and the second main surface.
    Type: Application
    Filed: September 3, 2021
    Publication date: March 10, 2022
    Inventors: Yoshizo OSUMI, Hiroaki MATSUBARA, Tomohira KIKUCHI
  • Publication number: 20220068776
    Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip to which different power-supply voltages are supplied, connection bonding wires connecting the first semiconductor chip and the second semiconductor chip to each other, and a sealing resin provided to fill a gap between a first lead frame on which the first semiconductor chip is mounted and a second lead frame on which the second semiconductor chip is mounted so as to cover the respective circumferences of the first semiconductor chip and the second semiconductor chip. The respective surfaces of the first lead frame and the second lead frame in the regions opposed to each other are covered with an insulating protection film including a material having higher electrical breakdown voltage than a material included in the sealing resin.
    Type: Application
    Filed: November 11, 2021
    Publication date: March 3, 2022
    Inventors: Yoshizo OSUMI, Taro NISHIOKA, Tomohira KIKUCHI, Tsunehisa ONO
  • Patent number: 10333499
    Abstract: A signal transmission circuit which transmits N (N is a natural number of 2 or more) input signals includes a transmission signal generation portion, 2N transmission portions and an output portion. The transmission signal generation portion generates 2N transmission signals according to the N input signals. The 2N transmission portions respectively transmit the 2N transmission signals output from the transmission signal generation portion while performing electrical insulation. The output portion generates and outputs, based on the 2N transmission signals transmitted by the 2N transmission portions, N output signals that respectively indicate the N input signals. The transmission signal generation portion generates a pulse according to the N input signals and incorporates the pulse in only one of the 2N transmission signals at the same time.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: June 25, 2019
    Assignee: Rohm Co., Ltd.
    Inventors: Toshiyuki Ishikawa, Daiki Yanagishima, Yoshizo Osumi
  • Publication number: 20180026611
    Abstract: A signal transmission circuit which transmits N (N is a natural number of 2 or more) input signals includes a transmission signal generation portion, 2N transmission portions and an output portion. The transmission signal generation portion generates 2N transmission signals according to the N input signals. The 2N transmission portions respectively transmit the 2N transmission signals output from the transmission signal generation portion while performing electrical insulation. The output portion generates and outputs, based on the 2N transmission signals transmitted by the 2N transmission portions, N output signals that respectively indicate the N input signals. The transmission signal generation portion generates a pulse according to the N input signals and incorporates the pulse in only one of the 2N transmission signals at the same time.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 25, 2018
    Inventors: Toshiyuki ISHIKAWA, Daiki YANAGISHIMA, Yoshizo OSUMI