Abstract: A semiconductor device such as a flash EEPROM has oxide/nitride/oxide sandwich structure deposited on a semiconductor substrate. Optical lithography and plasma-assisted etching are used to remove portions of the structure that extend over active regions. Since the nitride layer of the etched sandwich structure has oxidation proof, oxygen radical is prevented from reaching the substrate. Thus, the bird's beak is prevented from appearing.

Abstract: A semiconductor device such as a flash EEPROM has oxide/nitride/oxide sandwich structure deposited on a semiconductor substrate. Optical lithography and plasma-assisted etching are used to remove portions of the structure that extend over active regions. Since the nitride layer of the etched sandwich structure has oxidation proof, oxygen radical is prevented from reaching the substrate. Thus, the bird's beak is prevented from appearing.

Abstract: A semiconductor device such as a flash EEPROM has oxide/nitride/oxide sandwich structure deposited on a semiconductor substrate. Optical lithography and plasma-assisted etching are used to remove portions of the structure that extend over active regions. Since the nitride layer of the etched sandwich structure has oxidation proof, oxygen radical is prevented from reaching the substrate. Thus, the bird's beak is prevented from appearing.

Abstract: In a contactless nonvolatile semiconductor memory device including a semiconductor substrate and a plurality of impurity diffusion layers of a rectangular shape serving as sub bit lines on the semiconductor substrate, a plurality of grooves of a rectangular shape are formed in the semiconductor substrate between the impurity diffusion layers. Also, a first gate insulating layer is formed on the semiconductor substrate within the grooves, and a plurality of floating gate electrodes are formed on the first insulating layer. Further, a second gate insulating layer is formed on the floating gate electrodes, and a plurality of word lines are formed on the second gate insulating layer.

Abstract: To obtain a small contact-less memory device, a memory device includes a semiconductor chip having a first surface and a second surface located at a level lower than that of the first surface, a memory cell array formed on the second surface, a peripheral circuit, for operating the memory cell array, formed on the first surface, and a connecting portion, for electrically connecting the memory cell array to the peripheral circuit, formed on the first surface.

Abstract: To obtain a small contact-less memory device, a memory device includes a semiconductor chip having a first surface and a second surface located at a level lower than that of the first surface, a memory cell array formed on the second surface, a peripheral circuit, for operating the memory cell array, formed on the first surface, and a connecting portion, for electrically connecting the memory cell array to the peripheral circuit, formed on the first surface.

Abstract: In a contactless nonvolatile semiconductor memory device including a semiconductor substrate and a plurality of impurity diffusion layers of a rectangular shape serving as sub bit lines on the semiconductor substrate, a plurality of grooves of a rectangular shape are formed in the semiconductor substrate between the impurity diffusion layers. Also, a first gate insulating layer is formed on the semiconductor substrate within the grooves, and a plurality of floating gate electrodes are formed on the gate insulating layer. Further, a second gate insulating layer is formed on the floating gate electrodes, and a plurality of word lines are formed on the second gate insulating layer.

Abstract: In a method of manufacturing a semiconductor device, diffusion layers are formed on a semiconductor substrate using a mask. The diffusion layers has a conductive type different from that of the semiconductor substrate. Then, insulating films are formed on the diffusion layers using the mask and the mask is removed. Subsequently, a floating gate is formed between the insulating films on the semiconductor substrate via a first gate insulating film. Next, a second gate insulating film is formed on the floating gate and the insulating films, and a word line is formed to cover the floating gate via the second gate insulating film.

Abstract: In a method of a semiconductor device, an insulating film on a semiconductor substrate is formed. Then, a first mask on the insulating film in a first region is formed and the insulating film is removed using the first mask for isolation insulating films in the first region. In this case, an element to be formed in the first region has a first active region. Also, a second mask is formed on the insulating film in a second region. The second mask is different from the first mask. The insulting film is removed using the second mask for isolation insulating films in the second region. In this case, a first element to be formed in the first region has a first active region narrower than a second active region of a second element to be formed in the second region. Generally, the insulating film in the first region is removed and then the insulating film in the second region is removed.

Abstract: In a nonvolatile semiconductor memory device, buried diffusion layers are stripped parallel to each other in a surface region of a semiconductor substrate of a first conductivity type, and constitute bit lines. A select-gate electrode is formed on the semiconductor substrate, between source and drain regions, through a first gate insulating film to be parallel to the source and drain regions. At least one side of the select-gate electrode is offset from the source and drain regions. A floating-gate electrode is in contact with upper and side surfaces of the select-gate electrode through second and third gate insulating films, respectively, and with the semiconductor substrate through a fourth gate insulating film. The two sides of the floating-gate electrode at least partly overlap the source and drain regions. A control-gate electrode is formed on the floating-gate electrode to surround the floating-gate electrode through a fifth gate insulating film.

Abstract: A nonvolatile semiconductor memory is composed of a number of multi-bit memory cells, each including a first floating gate and a second floating gate formed, side by side, and insulated from each other, on a first gate insulator film formed on a channel region defined between a source region and a drain region, a second gate insulator film formed to cover a surface of each of the floating gates, and a control gate formed on the second gate insulator film. The first floating gate is positioned above a source side of the channel region, and the second floating gate is postioned above a drain side of the channel region. At least the first floating gate is formed of a side wall polysilicon having a gate length remarkably smaller than that of the second floating gate or the control gate. Accordingly, the resulting channel length of the memory cell is remarkably reduced, with the result that the occupying area of each memory cell and the occupying area of a necessary peripheral circuit can be reduced.

Abstract: A nonvolatile semiconductor memory is composed of a number of multi-bit memory cells, each including a first floating gate and a second floating gate formed, side by side, and insulated from each other, on a first gate insulator film formed on a channel region defined between a source region and a drain region, a second gate insulator film formed to cover a surface of each of the floating gates, and a control gate formed on the second gate insulator film. The first floating gate is positioned above a source side of the channel region, and the second floating gate is positioned above a drain side of the channel region. At least the first floating gate is formed of a side wall polysilicon having a gate length remarkably smaller than that of the second floating gate or the control gate. Accordingly, the resulting channel length of the memory cell is remarkably reduced, with the result that the occupying area of each memory cell and the occupying area of a necessary peripheral circuit can be reduced.

Abstract: In a nonvolatile semiconductor memory device, including a semiconductor substrate, a floating gate formed over the semiconductor substrate, and a control gate formed over the floating gate, a split gate is formed on a sidewall of the control gate and the floating gate and is electrically connected to the control gate. A source region and a drain region are formed in the semiconductor substrate on the sides of the control gate and the split gate.

Abstract: Disclosed herein is a stacked gate type non-volatile semiconductor memory cell including source/drain regions having a first portion covered with a tunnel oxide film and a second portion covered with an insulator film. The memory cell further includes a gate insulating film formed on a channel region, wherein the tunnel insulating film is thinner than the gate oxide film and the insulator film is thicker than the gate insulating film. A floating gate is formed on the respective insulating films and a control gate is formed over the floating gate with an intervention of a second gate insulating film.