Patents by Inventor You Sung Kim
You Sung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240171305Abstract: Disclosed herein are an apparatus and method for transmitting a covert message in wireless communication. The apparatus for transmitting a covert message in wireless communication may be configured to, in a covert message in which a data frame is composed of a Start Frame Delimiter (SFD), a header, a payload, and a Cyclic Redundancy Check (CRC), transmit the SFD of the covert message corresponding to a first sequence number masked with a preset SFD mask length, transmit the header of the covert message corresponding to a second sequence number masked with a preset header mask length, transmit the payload of the covert message corresponding to a third sequence number masked with a preset payload mask length, and transmit the CRC of the covert message corresponding to a fourth sequence number masked with a preset CRC mask length.Type: ApplicationFiled: July 11, 2023Publication date: May 23, 2024Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang-Woo LEE, Yong-Sung JEON, Ha-Young SEONG, You-Sung KANG, Ik-Kyun KIM
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Publication number: 20240158822Abstract: Disclosed herein are a microorganism with excellent deacetoxycephalosporin C (DAOC) productivity and a use thereof. A mutant microorganism with improved DAOC productivity and a use thereof for producing 7-aminodeacetoxycephalosporanic acid (7-ADCA) are provided.Type: ApplicationFiled: October 17, 2023Publication date: May 16, 2024Inventors: Zhe PIAO, Young sung YUN, Hyeon Seo LEE, Yeon Hee CHOI, Mi Suk KANG, Xue Mei PIAO, You Mi KIM, Ji Su LEE, Hong Xian LI, Dong Il SEO, Dong Won JEONG, Seung Ki KIM
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Publication number: 20240144894Abstract: Disclosed herein is a method for transmitting information using a monitor brightness change. The method may include generating a transmission data frame structure for transmitting digital information, encoding the bit of the digital information, and converting the encoded bit of the digital information into a wireless signal that is a brightness change signal of blue (B) color, among red, green, and blue (RGB) for configuring colors on a monitor.Type: ApplicationFiled: June 19, 2023Publication date: May 2, 2024Inventors: Yong-Sung JEON, Sang-Woo LEE, Ha-Young SEONG, You-Sung KANG, Ik-Kyun KIM
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Publication number: 20240071449Abstract: A storage device, a non-volatile memory device, and a method of operating the non-volatile memory device are provided. The storage device includes a storage controller configured to send a command and program data including a pattern of one or more bits, a non-volatile memory device configured to receive the command and the program data, and a pattern monitoring circuit configured to monitor a pattern of the program data sent from the storage controller. The pattern monitoring circuit is configured to send an abnormal status check bit to the storage controller when the program data includes repeated patterns that are repeated a preset number of times or more, and the storage controller is configured to resend the program data to the non-volatile memory device in response to receiving the abnormal status check bit.Type: ApplicationFiled: May 24, 2023Publication date: February 29, 2024Inventors: You Hwan Kim, Kyung Duk Lee, Ho-Sung Ahn, Youn-Soo Cheon
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Patent number: 8861278Abstract: A cache programming method for a non-volatile memory device includes programming data for a current programming operation into a memory cell array, determining whether the current programming operation has been performed to a threshold point of program completion, and receiving a data for a next programming operation when the current programming operation has been performed to the threshold point of program completion.Type: GrantFiled: November 8, 2011Date of Patent: October 14, 2014Assignee: Hynix Semiconductor Inc.Inventors: You-Sung Kim, Se-Chun Park
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Patent number: 8811082Abstract: A semiconductor memory device includes word lines stacked over a substrate having a plurality of memory block regions, select lines arranged over the word lines, vertical channel layers formed to penetrate through the select lines and the word lines and extending to the substrate, and a charge trap layer disposed between the word lines and the vertical channel layers, wherein the stacked word lines are separated by memory block groups that each include two or more memory block regions.Type: GrantFiled: June 8, 2012Date of Patent: August 19, 2014Assignee: SK Hynix Inc.Inventors: Tae Heui Kwon, You Sung Kim
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Patent number: 8743608Abstract: A nonvolatile memory apparatus includes: a memory cell array including a plurality of unit memory cells; a page buffer unit configured to read data from a selected memory cell of the memory cell array and store the read data; a controller configured to generate a reference current generation signal, a first current control signal, and a second current control signal, which correspond to the number of fail bits to be sensed and a deviation in cell current amounts flowing through the unit memory cells during a read operation, in response to a verification command; and a fail bit sensing unit configured to receive the reference current generation signal, the first current control signal, and the second current control signal from the controller in response to the verification command, and control at least one of a reference current amount and a data read current amount of the page buffer unit.Type: GrantFiled: March 6, 2012Date of Patent: June 3, 2014Assignee: SK Hynix Inc.Inventors: Sung Dae Choi, You Sung Kim, Min Su Kim
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Patent number: 8611155Abstract: Programming a semiconductor memory device includes: performing a program loop using a blind program operation until the selected cell threshold voltages reach a first verification level; upon detecting a cell having the threshold voltage reaching the first verification level, verifying whether a cell having the threshold voltage reached a second verification level higher than the first verification level; upon verifying a cell having the threshold voltage reaching the second verification level, continuously performing program loops on cells having the first verification level as a target level and on cells having the second verification level as a target level; and upon verifying no cell having the threshold voltage reaching the second verification level, performing a program loop on memory cells having a target level higher than the first verification level, after programming the memory cells having the first verification level as the target level.Type: GrantFiled: December 30, 2011Date of Patent: December 17, 2013Assignee: SK Hynix Inc.Inventors: Byung Ryul Kim, Duck Ju Kim, You Sung Kim
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Patent number: 8565027Abstract: A multi-chip package includes a voltage generating circuit configured to generate a power source voltage and a plurality of memory chips coupled to the voltage generating circuit to each receive the power source voltage, wherein the memory chips are each configured to postpone an operation if the power source voltage is lower than a target voltage and perform the operation when the power source voltage reaches the target voltage.Type: GrantFiled: December 2, 2011Date of Patent: October 22, 2013Assignee: Hynix Semiconductor Inc.Inventors: Bum Dol Kim, You Sung Kim
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Patent number: 8422309Abstract: A voltage generation circuit comprises a voltage generation control unit configured to output one of a first voltage level determination signal having a fixed data value and a second voltage level determination signal having a varying data value in response to a selection signal, and a voltage generation unit configured to generate a voltage having a single pulse form or a voltage having a pulse form whose rising edge portion rises in incremental voltage steps in response to the voltage level determination signal outputted from the voltage generation control unit.Type: GrantFiled: December 31, 2009Date of Patent: April 16, 2013Assignee: Hynix Semiconductor Inc.Inventors: Byung Ryul Kim, Duck Ju Kim, You Sung Kim, Se Chun Park
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Publication number: 20120314514Abstract: A semiconductor memory device includes word lines stacked over a substrate having a plurality of memory block regions, select lines arranged over the word lines, vertical channel layers formed to penetrate through the select lines and the word lines and extending to the substrate, and a charge trap layer disposed between the word lines and the vertical channel layers, wherein the stacked word lines are separated by memory block groups that each include two or more memory block regions.Type: ApplicationFiled: June 8, 2012Publication date: December 13, 2012Inventors: Tae Heui Kwon, You Sung Kim
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Publication number: 20120275222Abstract: A nonvolatile memory apparatus includes: a memory cell array including a plurality of unit memory cells; a page buffer unit configured to read data from a selected memory cell of the memory cell array and store the read data; a controller configured to generate a reference current generation signal, a first current control signal, and a second current control signal, which correspond to the number of fail bits to be sensed and a deviation in cell current amounts flowing through the unit memory cells during a read operation, in response to a verification command; and a fail bit sensing unit configured to receive the reference current generation signal, the first current control signal, and the second current control signal from the controller in response to the verification command, and control at least one of a reference current amount and a data read current amount of the page buffer unit.Type: ApplicationFiled: March 6, 2012Publication date: November 1, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Sung Dae CHOI, You Sung KIM, Min Su KIM
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Patent number: 8296499Abstract: A flash memory device includes a memory cell array, a peri circuit unit, an I/O controller, and a controller. The memory cell array includes a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines. The peri circuit unit is configured to program data into the memory cell array or read data stored in the memory cell array in response to a command input through a control bus. The I/O controller is configured to receive data for programming and supply the data to the peri circuit unit in response to a command provided through a data input/output (I/O) bus. The controller is configured to control the I/O controller to perform a voltage setup operation for a program while the data for program is received.Type: GrantFiled: December 4, 2007Date of Patent: October 23, 2012Assignee: Hynix Semiconductor Inc.Inventors: You-Sung Kim, Byung-Ryul Kim
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Publication number: 20120170373Abstract: Programming a semiconductor memory device includes: performing a program loop using a blind program operation until the selected cell threshold voltages reach a first verification level; upon detecting a cell having the threshold voltage reaching the first verification level, verifying whether a cell having the threshold voltage reached a second verification level higher than the first verification level; upon verifying a cell having the threshold voltage reaching the second verification level, continuously performing program loops on cells having the first verification level as a target level and on cells having the second verification level as a target level; and upon verifying no cell having the threshold voltage reaching the second verification level, performing a program loop on memory cells having a target level higher than the first verification level, after programming the memory cells having the first verification level as the target level.Type: ApplicationFiled: December 30, 2011Publication date: July 5, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Byung Ryul KIM, Duck Ju KIM, You Sung KIM
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Publication number: 20120155182Abstract: A cache programming method for a non-volatile memory device includes programming data for a current programming operation into a memory cell array, determining whether the current programming operation has been performed to a threshold point of program completion, and receiving a data for a next programming operation when the current programming operation has been performed to the threshold point of program completion.Type: ApplicationFiled: November 8, 2011Publication date: June 21, 2012Inventors: You-Sung KIM, Se-Chun PARK
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Patent number: 8199583Abstract: A method of performing a read operation in a flash memory device is disclosed. The flash memory has a memory cell array including at least one block, the block having a plurality of pages. The method comprises receiving a read command to read data from a selected page in the block; determining whether or not the block has any page that has not been programmed; performing a dummy data program operation on at least one page that is determined not to have been programmed; and executing the read command to read the data of the selected page after the dummy data program operation is completed.Type: GrantFiled: February 8, 2010Date of Patent: June 12, 2012Assignee: Hynix Semiconductor Inc.Inventors: You Sung Kim, Duck Ju Kim
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Publication number: 20120140579Abstract: A multi-chip package includes a voltage generating circuit configured to generate a power source voltage and a plurality of memory chips coupled to the voltage generating circuit to each receive the power source voltage, wherein the memory chips are each configured to postpone an operation if the power source voltage is lower than a target voltage and perform the operation when the power source voltage reaches the target voltage.Type: ApplicationFiled: December 2, 2011Publication date: June 7, 2012Inventors: Bum Dol Kim, You Sung Kim
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Patent number: 8138821Abstract: A swing width control circuit and a high voltage pumping circuit using the same are disclosed. The swing width control circuit includes a swing width controller for receiving a first pumping signal having a first swing width and generating a second pumping signal having a second swing width larger than the first swing width of the first pumping signal, in accordance with a level of a supply voltage to pump or precharge a voltage of a specific node, and a swing width holding device for maintaining a swing width of the specific node to be equal to the second swing width of the second pumping signal.Type: GrantFiled: July 13, 2009Date of Patent: March 20, 2012Assignee: Hynix Semiconductor Inc.Inventor: You Sung Kim
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Patent number: 8107291Abstract: A method of programming data in a flash memory device is disclosed. The memory device includes a memory cell array which in turn includes at least one block, and the block in turn includes a plurality of pages. A program command to program a plurality of pages in the block is received. The plurality of pages is programmed in a predefined order. An address corresponding to a page that was programmed last amongst the plurality of pages is stored.Type: GrantFiled: February 8, 2010Date of Patent: January 31, 2012Assignee: Hynix Semiconductor Inc.Inventors: You Sung Kim, Duck Ju Kim
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Patent number: 8085569Abstract: Multi-chip package devices and related data programming methods are disclosed. A multi-chip package device includes one or more memory chips and a controller. The one or more memory chips include a single level cell section and a multi level cell section. The controller is configured to control a first data storing operation for storing an input data to the single level cell section and control a second data storing operation for storing the input data stored in the single level section to the multi level cell section during an idle time.Type: GrantFiled: December 14, 2010Date of Patent: December 27, 2011Assignee: Hynix Semiconductor Inc.Inventor: You Sung Kim