Patents by Inventor You Xin Rao

You Xin Rao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Deployment of custom shift array macro cells in automated application specific integrated circuit design flow
    Patent number: 8875071
    Abstract: An automated method is provided for designing an integrated circuit. A net list of an integrated circuit design is generated, wherein the net list includes a scan chain having a sequence of individual scan cells. A sequence of two or more individual scan cells of the scan chain is identified as a candidate for replacement by a custom shift array macro cell. The identified sequence of two or more individual scan cells is then replaced with a custom shift array macro cell that provides a functionally equivalent shift function as the replaced sequence of two or more individual scan cells. The custom shift array macro cell includes only two input pins and one output pin.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: October 28, 2014
    Assignee: LSI Corporation
    Inventors: Hai Wang, Joseph Garofalo, Barry L. Bartholomew, Liu Ming Xu, Han Jun Zhang, You Xin Rao, Qin Xie
  • DESIGN AND DEPLOYMENT OF CUSTOM SHIFT ARRAY MACRO CELLS IN AUTOMATED APPLICATION SPECIFIC INTEGRATED CIRCUIT DESIGN FLOW
    Publication number: 20140270050
    Abstract: An automated method is provided for designing an integrated circuit. A net list of an integrated circuit design is generated, wherein the net list includes a scan chain having a sequence of individual scan cells. A sequence of two or more individual scan cells of the scan chain is identified as a candidate for replacement by a custom shift array macro cell. The identified sequence of two or more individual scan cells is then replaced with a custom shift array macro cell that provides a functionally equivalent shift function as the replaced sequence of two or more individual scan cells. The custom shift array macro cell includes only two input pins and one output pin.
    Type: Application
    Filed: May 29, 2013
    Publication date: September 18, 2014
    Inventors: Hai Wang, Joseph Garofalo, Barry L. Bartholomew, Liu Ming Xu, Han Jun Zhang, You Xin Rao, Qin Xie
  • Deployment of transmission gate logic cells in application specific integrated circuits
    Patent number: 8745558
    Abstract: A method is provided for designing an integrated circuit. The method includes generating a net list of an integrated circuit design, wherein the net list includes one or more component cells selected from a cell library. The component cells include transmission gate logic cells and sourcing cells that drive the transmission gate logic cells. Each transmission gate logic cell has an associated timing model with a timing characteristic defined as a function of a driving strength attribute of a sourcing cell used to characterize the transmission gate logic cell. The method further includes auditing the net list to determine if a given sourcing cell in the integrated circuit design has a sufficient driving strength based at least on the driving strength attribute of a transmission gate logic cell being driven by the given sourcing cell.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: June 3, 2014
    Assignee: LSI Corporation
    Inventors: Joseph Garofalo, Barry L. Bartholomew, Mujiang Luo, You Xin Rao