Patents by Inventor Youcun Hu
Youcun Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11538685Abstract: A method of forming a semiconductor structure includes providing a to-be-etched layer, forming a core layer over the to-be-etched layer, the core layer including a first trench extending along a first direction, forming a sidewall spacer layer on a top surface of the core layer and on sidewalls and a bottom surface of the first trench, forming a block cut structure in the first trench after forming the sidewall spacer layer, and after forming the block cut structure, etching back the sidewall spacer layer until exposing the top surface of the core layer, thereby leaving a sidewall spacer on the sidewalls of the first trench. The block cut structure extends through the first trench along a second direction. The second direction and the first direction are different. The block cut structure includes a first block-cut layer and a second block-cut layer.Type: GrantFiled: July 15, 2020Date of Patent: December 27, 2022Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventors: Xiamei Tang, Wei Shi, Tao Dou, Bo Su, Youcun Hu
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Patent number: 11430657Abstract: A method for fabricating a semiconductor device includes providing a to-be-etched layer, including alternately arranged first regions and second regions in a first direction. Each first region adjoins adjacent second regions, and each second region includes a trench region. The method includes forming a first mask layer on the to-be-etched layer; implanting doping ions into the first mask layer outside of the trench region; forming a doped separation layer in the first mask layer of the second region to divide the first mask layer into portions arranged in a second direction perpendicular to the first direction; forming a first trench in the first mask layer of the first region; and removing the first mask layer formed in the trench region on both sides of the doped separation layer to form a second trench divided into portions arranged in the second direction by the doped separation layer.Type: GrantFiled: February 28, 2020Date of Patent: August 30, 2022Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventors: Wei Shi, Youcun Hu
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Patent number: 11424318Abstract: A method for fabricating a capacitor device includes providing a substrate; forming a first-layer electrode on the substrate; and forming a conductive layer on the first-layer electrode. The roughness of the first-layer electrode is a first roughness, the roughness of the conductive layer is a second roughness, and the second roughness is smaller than the first roughness. The method further includes forming a dielectric layer on the conductive layer; and forming a second-layer electrode on the dielectric layer. According to the disclosed method and capacitor device, by forming the conductive layer on the first-layer electrode, the roughness of the bottom electrode of the capacitor device is reduced, which effectively reduces the presence of protrusions on the surface of the bottom electrode. Therefore, the breakdown electric voltage of the capacitor device may be improved, and leakage current may be avoided. As such, the reliability of the capacitor device may be improved.Type: GrantFiled: August 12, 2019Date of Patent: August 23, 2022Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventors: Lianfeng Hu, Youcun Hu, Ming Yang, Duohui Bei, Baibing Ni
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Patent number: 11251044Abstract: A method for fabricating a semiconductor device includes providing a to-be-etched layer, including alternately arranged first regions and second regions along a first direction; forming a first mask layer on the to-be-etched layer; and forming a top mask layer on the first region and extending to the second region along the first direction. The projection pattern of the top mask layer divides the first mask layer formed on the first region into portions arranged in a second direction that is perpendicular to the first direction. The method further includes removing a portion of the first mask layer formed on the first region on both sides of the top mask layer to form a first trench. The first mask layer on the first region under the top mask layer forms a separation mask layer which divides the first trench into portions arranged in the second direction.Type: GrantFiled: February 27, 2020Date of Patent: February 15, 2022Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventors: Wei Shi, Youcun Hu
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Patent number: 11011412Abstract: A semiconductor structure and a method for forming same are provided.Type: GrantFiled: August 30, 2019Date of Patent: May 18, 2021Assignees: Semiconductor Manufacturing (Shanghai) International Corporation, Semiconductor Manufacturing (Beijing) International CorporationInventors: Wei Shi, Youcun Hu, Xiamei Tang
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Publication number: 20210020442Abstract: A method of forming a semiconductor structure includes providing a to-be-etched layer, forming a core layer over the to-be-etched layer, the core layer including a first trench extending along a first direction, forming a sidewall spacer layer on a top surface of the core layer and on sidewalls and a bottom surface of the first trench, forming a block cut structure in the first trench after forming the sidewall spacer layer, and after forming the block cut structure, etching back the sidewall spacer layer until exposing the top surface of the core layer, thereby leaving a sidewall spacer on the sidewalls of the first trench. The block cut structure extends through the first trench along a second direction. The second direction and the first direction are different. The block cut structure includes a first block-cut layer and a second block-cut layer.Type: ApplicationFiled: July 15, 2020Publication date: January 21, 2021Inventors: Xiamei TANG, Wei SHI, Tao DOU, Bo SU, Youcun HU
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Publication number: 20200411366Abstract: A semiconductor structure and a method for forming same are provided.Type: ApplicationFiled: August 30, 2019Publication date: December 31, 2020Applicants: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) CorporationInventors: Wei SHI, Youcun HU, Xiamei TANG
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Publication number: 20200279738Abstract: A method for fabricating a semiconductor device includes providing a to-be-etched layer, including alternately arranged first regions and second regions along a first direction; forming a first mask layer on the to-be-etched layer; and forming a top mask layer on the first region and extending to the second region along the first direction. The projection pattern of the top mask layer divides the first mask layer formed on the first region into portions arranged in a second direction that is perpendicular to the first direction. The method further includes removing a portion of the first mask layer formed on the first region on both sides of the top mask layer to form a first trench. The first mask layer on the first region under the top mask layer forms a separation mask layer which divides the first trench into portions arranged in the second direction.Type: ApplicationFiled: February 27, 2020Publication date: September 3, 2020Inventors: Wei SHI, Youcun HU
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Publication number: 20200279741Abstract: A method for fabricating a semiconductor device includes providing a to-be-etched layer, including alternately arranged first regions and second regions in a first direction. Each first region adjoins adjacent second regions, and each second region includes a trench region. The method includes forming a first mask layer on the to-be-etched layer; implanting doping ions into the first mask layer outside of the trench region; forming a doped separation layer in the first mask layer of the second region to divide the first mask layer into portions arranged in a second direction perpendicular to the first direction; forming a first trench in the first mask layer of the first region; and removing the first mask layer formed in the trench region on both sides of the doped separation layer to form a second trench divided into portions arranged in the second direction by the doped separation layer.Type: ApplicationFiled: February 28, 2020Publication date: September 3, 2020Inventors: Wei SHI, Youcun HU
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Publication number: 20200105865Abstract: A method for fabricating a capacitor device includes providing a substrate; forming a first-layer electrode on the substrate; and forming a conductive layer on the first-layer electrode. The roughness of the first-layer electrode is a first roughness, the roughness of the conductive layer is a second roughness, and the second roughness is smaller than the first roughness. The method further includes forming a dielectric layer on the conductive layer; and forming a second-layer electrode on the dielectric layer. According to the disclosed method and capacitor device, by forming the conductive layer on the first-layer electrode, the roughness of the bottom electrode of the capacitor device is reduced, which effectively reduces the presence of protrusions on the surface of the bottom electrode. Therefore, the breakdown electric voltage of the capacitor device may be improved, and leakage current may be avoided. As such, the reliability of the capacitor device may be improved.Type: ApplicationFiled: August 12, 2019Publication date: April 2, 2020Inventors: Lianfeng HU, Youcun HU, Ming Yang, Duohui BEI, Baibing Ni
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Patent number: 8507355Abstract: A method of manufacturing high performance metal-oxide-metal capacitor device that resolves problems with implementing high capacitance in the metal-oxide-metal region by filling with a low-k material both in the metal-oxide-metal region and the metal interconnection region, utilizing performing selective photolithography and etching of the first dielectric layer to define metal-oxide-metal (MOM for short) region, and filling the MOM region with high dielectric constant (high-k) material to realize a high performance MOM capacitor.Type: GrantFiled: December 29, 2011Date of Patent: August 13, 2013Assignee: Shanghai Huali Microelectronics CorporationInventors: Youcun Hu, Lei Li, Chaos Zhang, Feng Ji, Yuwen Chen
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Publication number: 20120322256Abstract: The manufacturing method of the high performance metal-oxide-metal according to the present invention resolves the problems of implementing high capacitance in the metal-oxide-metal region by the steps of filling with a low-k material both in the metal-oxide-metal region and the metal interconnection region, utilizing performing selective photolithography and etching of the first dielectric layer to define metal-oxide-metal (MOM for short) region, and fulfilling the MOM region with high dielectric constant (high-k) material to realize a high performance MOM capacitor. Using the present method, high-k material and low-k material within the same film layer are realized. High-k material region is used as MOM to achieve high capacitor c, thereby reducing the area used by chips and further improving the electrics performance.Type: ApplicationFiled: December 29, 2011Publication date: December 20, 2012Applicant: SHANGHAI HUALI MICROELECTRONICS CORPORATIONInventors: Youcun Hu, Lei Li, Chaos Zhang, Feng Ji, Yuwen Chen