Patents by Inventor Youichi Kajiwara

Youichi Kajiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9041160
    Abstract: A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: May 26, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Mitsuru Okazaki, Youichi Kajiwara, Naoki Takahashi, Akira Shimizu
  • Publication number: 20140299970
    Abstract: A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 9, 2014
    Inventors: Mitsuru Okazaki, Youichi Kajiwara, Naoki Takahashi, Akira Shimizu
  • Patent number: 8786092
    Abstract: A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: July 22, 2014
    Assignee: Rohm Co., Ltd.
    Inventors: Mitsuru Okazaki, Youichi Kajiwara, Naoki Takahashi, Akira Shimizu
  • Publication number: 20120241969
    Abstract: A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.
    Type: Application
    Filed: September 22, 2011
    Publication date: September 27, 2012
    Applicant: ROHM CO., LTD.
    Inventors: Mitsuru OKAZAKI, Youichi KAJIWARA, Naoki TAKAHASHI, Akira SHIMIZU
  • Publication number: 20090096107
    Abstract: In a semiconductor integrated circuit device, an element forming region and a metal wiring layer are covered with a passivation layer on a semiconductor substrate which is cut out in a rectangular shape. At four corners of the device, the passivation layer is provided with corner non-wiring regions formed directly on the semiconductor substrate. Thus, crack generation on the passivation layer due to heat stress can be suppressed.
    Type: Application
    Filed: June 13, 2006
    Publication date: April 16, 2009
    Applicant: Rohm Co., Ltd
    Inventors: Mitsuru Okazaki, Youichi Kajiwara, Naoki Takahashi, Akira Shimizu
  • Publication number: 20080253047
    Abstract: In a semiconductor device, a problem of heat generation and power loss is alleviated, and the semiconductor device is protected against the failure due to the overcurrent. The semiconductor device includes an IC chip having a large-current output. In the IC chip a measuring terminal is electrically connected with a first pad via a gold wire. A potential difference generated by the impedance of the gold wire is compared with a predetermined value. When the potential difference exceeds the predetermined threshold level, the semiconductor device operates to turn off a PMOS-type transistor.
    Type: Application
    Filed: May 23, 2005
    Publication date: October 16, 2008
    Inventors: Hirotaka Takihara, Youichi Kajiwara, Masanori Tsuchihashi
  • Publication number: 20080129477
    Abstract: According to the invention, a transmission device has a transmission antenna portion, an output portion that has a first switch and a second switch connected in series between two different potentials and that derives from the node between the first and second switches an output current fed to the transmission antenna portion, an output driving portion that controls turning-on and -off of the first and second switches, and duty ratio setting means for variably setting the duty ratio at which the output driving portion drives the first and second switches. The invention makes it possible to adjust the radiowave coverage area of the transmission antenna portion easily without complicated work.
    Type: Application
    Filed: November 18, 2005
    Publication date: June 5, 2008
    Applicant: ROHM CO., LTD.
    Inventors: Naoki Takahashi, Youichi Kajiwara