Abstract: The present disclosure relates to a printed circuit board including, a first insulating layer, a first metal layer disposed on the first insulating layer, a bridge disposed on the first metal layer and including a bridge insulating layer and a bridge circuit layer, a second insulating layer disposed on the first insulating layer and covering at least a portion of the bridge, a second metal layer disposed on the second insulating layer, and a connecting via penetrating the bridge and the second insulating layer to connect the first metal layer to the second insulating layer. The connecting via is spaced apart from the bridge circuit layer.

Abstract: A printed circuit board includes a substrate, a first pad and a second pad, respectively disposed on an upper side of the substrate, a first socket disposed in the substrate and including a first circuit, and a first trace disposed in the substrate and disposed between the first and second pads and the first socket with respect to a lamination direction. At least a portion of the first circuit is electrically connected to each of the first and second pads, and is electrically connected to the second pad through a path passing through the first trace.

Abstract: A printed circuit board includes: a bridge including a first insulating material, a wiring pattern disposed in the first insulating layer, a metal post disposed on the first insulating material and connected to the wiring pattern, and a second insulating material disposed on the first insulating material and covering at least a portion of the metal post; a first build-up insulating material disposed around the bridge; and a first redistribution pattern disposed on the second insulating material and the first build-up insulating material and including a metal pad connected to the metal post.

Abstract: A printed circuit board includes: a plurality of insulating layers; a plurality of wiring pattern layers disposed on at least one surface of the plurality of insulating layers; a via connecting wiring pattern layers, among the plurality of wiring pattern layers, disposed on upper and lower surfaces of one of the plurality of insulating layers to each other; a connection pad disposed on a surface of an outermost layer among the plurality of insulating layers; and a solder resist having a hole exposing at least a portion of the connection pad. An external surface of the solder resist has surface roughness.

Abstract: A copper clad laminate and a method to manufacture the same are provided. In one general aspect, a copper clad laminate include a first copper clad layer on a first surface of an insulating layer, and a second copper clad layer on a second surface of the insulating layer. The second copper clad layer includes polymer resin layer, a second copper layer, and a carrier foil layer.

Abstract: A fan-out semiconductor package includes a semiconductor chip having an active surface, the active surface having a connection pad disposed thereon, and an inactive surface opposing the active surface; an encapsulant encapsulating at least a portion of the semiconductor chip; an insulating layer disposed on the active surface of the semiconductor chip; and a redistribution layer disposed on the insulating layer and electrically connected to the connection pad. The insulating layer includes a low tan delta (Df) dielectric material.

Abstract: A fan-out semiconductor package includes a semiconductor chip having an active surface, the active surface having a connection pad disposed thereon, and an inactive surface opposing the active surface; an encapsulant encapsulating at least a portion of the semiconductor chip; an insulating layer disposed on the active surface of the semiconductor chip; and a redistribution layer disposed on the insulating layer and electrically connected to the connection pad. The insulating layer includes a low Df dielectric material.

Abstract: A resin-coated copper foil includes: a copper foil layer including a first surface and a second surface, wherein a laser absorptance of the first surface of the copper foil layer is greater than a laser absorptance of the second surface of the copper foil layer, and wherein ribs are formed on the second surface of the copper foil layer; a carrier film disposed on the first surface of the copper foil layer; a primer resin layer disposed on the second surface of the copper foil layer; and a build-up resin layer disposed on the primer resin layer.

Abstract: A copper clad laminate and a method to manufacture the same are provided. In one general aspect, a copper clad laminate include a first copper clad layer on a first surface of an insulating layer, and a second copper clad layer on a second surface of the insulating layer. The second copper clad layer includes polymer resin layer, a second copper layer, and a carrier foil layer.

Abstract: There is provided a method for measuring a coefficient of thermal expansion including: a step (S100) of providing two or more samples; a step (S200) of obtaining measured coefficients of thermal expansion of the two or more samples by means of a thermal mechanical analyzer; and a step (S300) of deriving a correction expression of an estimated coefficient of thermal expansion that is to be applied to the thermal mechanical analyzer through the two or more measured coefficients of thermal expansion obtained in the step (S200) and a linear regression analysis.

Abstract: Disclosed herein is a method for manufacturing a multi-layered printed circuit board, the method including: an operation of preparing a substrate having an insulating layer and a surface-treated copper foil sequentially formed on an inner layer circuit; an operation of forming a hole exposing the insulating layer by performing a primary processing for the surface-treated copper foil and a part of the insulating layer with laser; and an operation of forming a through-hole exposing the inner layer circuit by performing a secondary processing for the exposed insulating layer with a chemical etching liquid.