Patents by Inventor Youn-Ho Choi

Youn-Ho Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7755909
    Abstract: A main board suitable for slim configurations is disclosed. The main board includes a multi-layer Printed Circuit Board (PCB) in which at least one recess is formed, a first integrated circuit placed in the recess, and a molding that covers the first integrated circuit and the bottom of the recess. The main board further comprising a cover over said recess, said cover being a second integrated circuit or a second PC board, which may further having attached an integrated circuit positioned within the recess.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: July 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seok-Myong Kang, Hong-Kweun Kim, June-Hyeon Ahn, Ki-Hyun Kim, Youn-Ho Choi
  • Patent number: 7751202
    Abstract: Disclosed is a multi-layered printed circuit board including a plurality of insulation layers; a plurality of conductive patterns stacked on the multi-layered printed circuit board while alternating with the insulation layers; an integrated circuit positioned inside a core insulation layer of the insulation layers so as to be embedded in the multi-layered printed circuit board, a plurality of external connection terminal being positioned on a surface of the integrated circuit for external electric connection; and a film attached to a surface of the integrated circuit, the film having a plurality of inner conductive pads in one-to-one electric connection with the external connection terminals, the film being electrically connected to an adjacent conductive pattern layer.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: July 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Seong Seo, Young-Min Lee, Youn-Ho Choi
  • Publication number: 20100140782
    Abstract: A Printed Circuit Board (PCB) is provided in which at least one built-in Integrated Circuit (IC) package has a plurality of conductive bumps on an IC. The plurality of conductive bumps are for external electrical connection. The IC package is accommodated within a core layer of a multi-layer PCB by a connection member on the IC. The connection member is formed between the conductive bumps and the core layer with contact holes in contact with the conductive bumps. The conductive bumps are electrically connected through conductor layers formed in the contact holes.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 10, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hyun Kim, Shi-Yun Cho, Young-Min Lee, Kyu-sub Kwak, Youn-Ho Choi
  • Publication number: 20100146463
    Abstract: A watch phone and a method for handling an incoming call using the watch phone are provided. In the watch phone, a display device includes a touch screen panel and a display, turns off the touch screen panel in a watch mode, turns on the touch screen panel in an idle mode or upon receipt of an incoming call, and displays at least two areas for call connection and call rejection, upon receipt of the incoming call. A single mode selection key selects one of the watch mode and the idle mode. A controller performs control operations so that the touch screen panel is turned off in the watch mode and is turned on in the idle mode or upon receipt of the incoming call, and connects or rejects the incoming call, when the at least two areas for call connection or call rejection, which are displayed upon receipt of the incoming call, are pointed to or dragged to.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 10, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Shi-Yun CHO, Ji-Hyun Jung, Ho-Jin Lee, Young-Min Lee, Ho-Seong Seo, Youn-Ho Choi
  • Publication number: 20100007475
    Abstract: An apparatus and method for allowing a user to dynamically enjoy a video. A difference between image data is computed at every preset unit of time and a vibration corresponding to the computed difference is generated so that the user can sense a motion change of an object within the video. Upon video reproduction, scenes are displayed by applying the lighting effect of a strobe light or the like between the scenes to be reproduced. Upon video reproduction, more enjoyment and various haptic effects can be provided to the user.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 14, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Jin Lee, Young-Min Lee, Shi-Yun Cho, Ho-Seong Seo, Youn-Ho Choi, Ji-Hyun Jung
  • Publication number: 20090324329
    Abstract: A manhole cover for preventing the inflow of a bad smell and a harmful insect is provided. More particularly, the manhole cover includes a manhole top plate that has a plurality of drainage holes and a display part; a drainage guide plate that is integrally formed in a bottom part of the manhole top plate; a gate that is provided in a front end exit of the drainage guide plate and that is closed by a weight; and walls that are vertically and integrally formed in four edges of the manhole top plate. The display part, which is provided in one side of the manhole top plate can perform a specific display such as a trademark, a firm name, a logo, a slogan. The gate can be fully opened or closed within a space part by forming the space part in a lower part of the display part.
    Type: Application
    Filed: May 23, 2006
    Publication date: December 31, 2009
    Inventor: Youn Ho Choi
  • Publication number: 20090057001
    Abstract: An IC package includes: a multi-layered PCB having a plurality of insulating layers and a plurality of conductive pattern layers stacked in sequence and a plurality of via-holes formed through the plurality of the insulating layers for an electrical connection between the layers; and an IC chip disposed in a core insulating layer of the plurality of the insulating layers to be embedded in the multi-layered PCB and including a plurality of input/output pads on their surface. The input/output pads disposed at an outermost area of the IC chip are coupled to outer terminals by connection members without passing through said via-hole, the remaining input/output pads except for the input/output pads disposed at the outermost area of the IC chip are coupled to the outer terminals through the via-hole.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Inventors: Ji-Hyun JUNG, Shi-Yun Cho, Young-Min Lee, Youn-Ho Choi
  • Publication number: 20080273314
    Abstract: A multi-layer PCB includes a plurality of insulating layers and a plurality of conductive pattern layers alternatively and repeatedly stacked; contact-hole formed in the insulating layers so as to allow electrical connection through the contact-holes; a first integrated circuit arranged in a first insulating layer as one of the insulating layers so as to be embedded in the multi-layer PCB, the first integrated circuit having a plurality of connection bumps for electric connection on an upper surface of the first integrated circuit; and a second integrated circuit stacked on a lower surface of the first integrated circuit, the second integrated circuit having a plurality of connection bumps for electric connection on an upper surface of the second integrated circuit.
    Type: Application
    Filed: April 25, 2008
    Publication date: November 6, 2008
    Inventors: Shi-Yun Cho, Ho-Seong Seo, Youn-Ho Choi
  • Publication number: 20080237894
    Abstract: Disclosed are an integrated circuit chip package and a method of connecting an integrated circuit chip and an attachment subject to each other while interposing an adhesive therebetween. The connection between integrated circuit chip and the attachment subject stress often leads to component failure and the addition of an interface layer with a similar thermal expansion coefficient improves reliability. The method may include applying the adhesive on the attachment subject, forming an interface layer between the integrated circuit chip and the adhesive wherein the interface layer has a thermal expansion coefficient similar to a thermal expansion coefficient of the integrated circuit chip. By connecting an integrated circuit chip and the attachment subject to each other by an adhesive via the interface layer, the generation of delamination is minimized and reliability is improved.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 2, 2008
    Inventors: Ki-Hyun KIM, Jin Yu, Young-Min Lee, June-Hyeon Ahn, Ho-Seong Seo, Youn-Ho Choi, Yong Jung, Taek-Yeong Lee, Young-Kun Jee
  • Publication number: 20080123309
    Abstract: A main board suitable for slim configurations is disclosed. The main board includes a multi-layer Printed Circuit Board (PCB) in which at least one recess is formed, a first integrated circuit placed in the recess, and a molding that covers the first integrated circuit and the bottom of the recess. The main board further comprising a cover over said recess, said cover being a second integrated circuit or a second PC board, which may further having attached an integrated circuit positioned within the recess.
    Type: Application
    Filed: November 26, 2007
    Publication date: May 29, 2008
    Inventors: Seok-Myong KANG, Hong-Kweun Kim, June-Hyeon Ahn, Ki-Hyun Kim, Youn-Ho Choi
  • Publication number: 20080117608
    Abstract: Disclosed are a multi-layer PCB and a fabricating method thereof. The multi-layer PCB includes: a core; a plurality of insulation layers and a plurality of conductive pattern layers alternatively stacked on both sides of the core; and a plurality of via holes formed through the core and the insulation layers. The fabricating method may includes the steps of: forming a conductive pattern layer on each of both sides of a core, and forming via holes through the core; attaching a double-stick tape with weak adhesive strength to a portion of each of a upper surface and a lower surface of the core; and forming an insulation layer on each of a upper surface and a lower surface of the core to cover the double-stick tapes, and forming a conductive pattern layer on each of the insulation layers.
    Type: Application
    Filed: October 17, 2007
    Publication date: May 22, 2008
    Inventors: Ho-Seong Seo, Young-Min Lee, Shi-Yun Cho, Youn-Ho Choi, Sang-Hyun Kim
  • Publication number: 20080073797
    Abstract: A semiconductor die module, a semiconductor package, and a fabrication method of the semiconductor package. A method for manufacturing a semiconductor package includes the steps of: preparing a printed circuit board in which a hole is formed to extend through a core, and an insulation layer and a circuit pattern are formed on a surface of the core, the printed circuit board having an open surface; forming conductive bumpers on some of the electric pads of each semiconductor die; forming a semiconductor die module in which the electric pads of each semiconductor die are connected to one another; inserting the semiconductor die module into the hole of the core so as to safely seat the semiconductor die module on the insulation layer and the circuit pattern; and forming the insulation layer and the circuit patterns on an open upper surface of the core.
    Type: Application
    Filed: September 6, 2007
    Publication date: March 27, 2008
    Inventors: Sang-Hyun Kim, Shi-Yun Cho, Ho-Seong Seo, Youn-Ho Choi
  • Publication number: 20080061404
    Abstract: An electronic circuit package and fabricating method thereof. The method includes: integrating a radio frequency circuit device and a semiconductor die on a printed circuit board; forming a bumper pad of metal on the printed circuit board around the radio frequency circuit device; forming a molding on the printed circuit board to include the radio frequency circuit device and the semiconductor die therein; and forming one or more grooves on a portion of the molding and inserting a can into the grooves. The electronic circuit package includes: a printed circuit board; a radio frequency circuit device and a semiconductor die integrated on the printed circuit board; a molding formed on the printed circuit board to include the radio frequency circuit device and the semiconductor die therein; one or more grooves formed in the molding to enclose the radio frequency circuit device; and a can inserted into the grooves.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 13, 2008
    Inventors: Shi-Yun Cho, Young-Min Lee, Youn-Ho Choi, Ho-Seong Seo, Sang-Hyun Kim
  • Publication number: 20080062657
    Abstract: Disclosed is a multi-layered printed circuit board including a plurality of insulation layers; a plurality of conductive patterns stacked on the multi-layered printed circuit board while alternating with the insulation layers; an integrated circuit positioned inside a core insulation layer of the insulation layers so as to be embedded in the multi-layered printed circuit board, a plurality of external connection terminal being positioned on a surface of the integrated circuit for external electric connection; and a film attached to a surface of the integrated circuit, the film having a plurality of inner conductive pads in one-to-one electric connection with the external connection terminals, the film being electrically connected to an adjacent conductive pattern layer.
    Type: Application
    Filed: March 13, 2007
    Publication date: March 13, 2008
    Inventors: Ho-Seong SEO, Young-Min Lee, Youn-Ho Choi
  • Publication number: 20080029871
    Abstract: Disclosed is an interposer including a polyhedral body having first and second surfaces facing each other, a plurality of electric terminals formed on the first surface; and a plurality of vias extending through the first and second surfaces. In addition, a semiconductor package includes a printed circuit board having a plurality of electric contacts formed on an upper surface and an interposer having first and second surfaces facing each other, vias extending through the first and second surfaces, and first electric terminals formed on the first surface. The interposer is seated on the printed circuit board so that the vias correspond to the electric contacts.
    Type: Application
    Filed: February 8, 2007
    Publication date: February 7, 2008
    Inventors: Hong-Kweun KIM, June-Hyeon Ahn, Ki-Hyun Kim, Seok-Myong Kang, Youn-Ho Choi