Patents by Inventor Youn-Jae Kook
Youn-Jae Kook has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240159714Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.Type: ApplicationFiled: November 13, 2023Publication date: May 16, 2024Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
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Patent number: 11815492Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.Type: GrantFiled: April 15, 2021Date of Patent: November 14, 2023Assignee: BFLY Operations, Inc.Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
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Publication number: 20210325349Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.Type: ApplicationFiled: April 15, 2021Publication date: October 21, 2021Applicant: Butterfly Network, Inc.Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
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Publication number: 20210328564Abstract: Aspects of the technology described herein relate to built-in self-testing (BIST) of circuitry (e.g., a pulser or receive circuitry) and/or transducers in an ultrasound device. A BIST circuit may include a transconductance amplifier coupled between a pulser and receive circuitry, a capacitor network coupled between a pulser and receive circuitry, and/or a current source couplable to the input terminal of receive circuitry to which a transducer is also couplable. The collapse voltages of transducers may be characterized using BIST circuitry, and a bias voltage may be applied to the membranes of the transducers based at least in part on their collapse voltages. The capacitances of transducers may also be measured using BIST circuitry and a notification may be generated based on the sets of measurements.Type: ApplicationFiled: April 15, 2021Publication date: October 21, 2021Applicant: Butterfly Network, Inc.Inventors: Chao Chen, Youn-Jae Kook, Jihee Lee, Kailiang Chen, Leung Kin Chiu, Joseph Lutsky, Nevada J. Sanchez, Sebastian Schaetz, Hamid Soleimani
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Patent number: 10593634Abstract: Various embodiments of an integrated device package with integrated antennas are disclosed. In some embodiments, an antenna can be defined along a die pad of the package. In some embodiments, an antenna can be disposed in a first packaging component, and an integrated device die can be disposed in a second packaging component. The first and second packaging components can be stacked on one another and electrically connected. In some embodiments, a package can include one or a plurality of antennas disposed along a wall of a package body. The plurality of antennas can be disposed facing different directions from the package.Type: GrantFiled: December 30, 2016Date of Patent: March 17, 2020Assignee: Analog Devices, Inc.Inventors: Youn-Jae Kook, Yeonsung Kim, Dipak Sengupta
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Publication number: 20190299251Abstract: Aspects of technology described herein relate to ultrasound apparatuses including capacitive micromachines ultrasonic transducers (CMUTs) that are directly electrically coupled to delta-sigma analog-to-digital converters (ADCs). The apparatus may lack an amplifier or multiplexer between each CMUT and delta-sigma ADC. The apparatus may include between 100 and 20,000 CMUTs and between 100 and 20,000 delta-sigma ADCs, each of the CMUTs directly electrically coupled to one of the delta-sigma ADCs. The CMUTs and the delta-sigma ADCs may be monolithically integrated on a single substrate. The delta-sigma ADCs may lack an integrator distinct from the CMUT. An internal capacitance of the CMUT may serve as an integrator for the delta-sigma ADC.Type: ApplicationFiled: June 18, 2019Publication date: October 3, 2019Applicant: Butterfly Network, Inc.Inventors: Chao Chen, Kailiang Chen, Leung Kin Chiu, Youn-Jae Kook, Keith G. Fife
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Patent number: 10247600Abstract: Systems and techniques are described for matching the resonance frequencies of multiple resonators. In some embodiments, a resonator generates an output signal reflecting the resonator's response to an input drive signal and an input noise signal. The output signal is then compared to the noise signal to derive a signal representative of the resonance frequency of the resonator. Comparing that signal to the output signal of a second resonator gives an indication of whether there is a difference between the resonance frequencies of the two resonators. If there is, one or both of the resonators may be adjusted. In this manner, the resonance frequencies of resonators may be matched during normal operation of the resonators.Type: GrantFiled: November 10, 2016Date of Patent: April 2, 2019Assignee: Analog Devices, Inc.Inventors: Youn-Jae Kook, Jose Barreiro Silva, Jianrong Chen, Ronald A. Kapusta, Jr.
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Publication number: 20180190600Abstract: Various embodiments of an integrated device package with integrated antennas are disclosed. In some embodiments, an antenna can be defined along a die pad of the package. In some embodiments, an antenna can be disposed in a first packaging component, and an integrated device die can be disposed in a second packaging component. The first and second packaging components can be stacked on one another and electrically connected. In some embodiments, a package can include one or a plurality of antennas disposed along a wall of a package body. The plurality of antennas can be disposed facing different directions from the package.Type: ApplicationFiled: December 30, 2016Publication date: July 5, 2018Inventors: Youn-Jae Kook, Yeonsung Kim, Dipak Sengupta
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Publication number: 20180128674Abstract: Systems and techniques are described for matching the resonance frequencies of multiple resonators. In some embodiments, a resonator generates an output signal reflecting the resonator's response to an input drive signal and an input noise signal. The output signal is then compared to the noise signal to derive a signal representative of the resonance frequency of the resonator. Comparing that signal to the output signal of a second resonator gives an indication of whether there is a difference between the resonance frequencies of the two resonators. If there is, one or both of the resonators may be adjusted. In this manner, the resonance frequencies of resonators may be matched during normal operation of the resonators.Type: ApplicationFiled: November 10, 2016Publication date: May 10, 2018Applicant: Analog Devices, Inc.Inventors: Youn-Jae Kook, Jose Barreiro Silva, Jianrong Chen, Ronald A. Kapusta, JR.
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Patent number: 8941438Abstract: An apparatus for limiting the bandwidth of an amplifier provides for the design of an input impedance, a feedback impedance, and a load impedance such that the load impedance is proportional to the sum of the input impedance and feedback impedance. A sampling circuit has a load impedance including a resistor and capacitor in series to reduce the effective amplifier transconductance, which decreases bandwidth without increasing noise density or making this circuit more difficult to drive than a conventional circuit.Type: GrantFiled: November 5, 2012Date of Patent: January 27, 2015Assignee: Analog Devices, Inc.Inventors: Ronald A. Kapusta, Youn-Jae Kook
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Publication number: 20140125407Abstract: An apparatus for limiting the bandwidth of an amplifier provides for the design of an input impedance, a feedback impedance, and a load impedance such that the load impedance is proportional to the sum of the input impedance and feedback impedance. A sampling circuit has a load impedance including a resistor and capacitor in series to reduce the effective amplifier transconductance, which decreases bandwidth without increasing noise density or making this circuit more difficult to drive than a conventional circuit.Type: ApplicationFiled: November 5, 2012Publication date: May 8, 2014Applicant: ANALOG DEVICES, INC.Inventors: Ronald A. Kapusta, Youn-Jae Kook