Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

Abstract: A storage device, a non-volatile memory device, and a method of operating the non-volatile memory device are provided. The storage device includes a storage controller configured to send a command and program data including a pattern of one or more bits, a non-volatile memory device configured to receive the command and the program data, and a pattern monitoring circuit configured to monitor a pattern of the program data sent from the storage controller. The pattern monitoring circuit is configured to send an abnormal status check bit to the storage controller when the program data includes repeated patterns that are repeated a preset number of times or more, and the storage controller is configured to resend the program data to the non-volatile memory device in response to receiving the abnormal status check bit.

Abstract: A method of operating a memory device includes reading a first page of memory cells containing at least one worn-out memory cell therein using a read voltage, from a first memory block, and reading a second page of memory cells, which extends adjacent to the first page in the first memory block, using the read voltage. An operation is performed to determine a match rate between a position of a column including a “0” bit in the first page with a position of a column including a “0” bit in the second page. Thereafter, the second page is read by adjusting a read pass voltage applied to a word line of another page in the first memory block, when the match rate exceeds a threshold match rate.

Abstract: In an integrated circuit device and method of manufacturing the same, a conductive structure and a wiring structure are sequentially arranged on a substrate having a through hole. The conductive structure includes semiconductor chips and a contact structure. The wiring structure includes a metal line through which signals are transferred to the conductive structure. A penetration electrode is positioned in the through hole. The penetration electrode includes a conductive plug electrically connected to one of the conductive structure and the wiring structure, and a pair of a base layer and a gap interposed between the conductive plug and a sidewall of the through-hole, thereby enclosing the conductive plug. The base layer also includes a product of a solid reaction of reactants of which diffusion speeds are different. Accordingly, the dielectric characteristics of the penetration electrode are improved by using the gap as a dielectric gap.

Abstract: An in-plane switching mode LCD device and a method for manufacturing the same is disclosed, in which the in-plane switching mode LCD device includes a substrate; a plurality of common electrodes at fixed intervals in one direction on the substrate; an insulating layer on the substrate including the plurality of common electrodes; a plurality of pixel electrodes at fixed intervals on the insulating layer between the respective plurality of common electrodes; and a dummy common electrode on the insulating layer at one side of one of the pixel electrodes, wherein the dummy common electrode is electrically connected to an outermost common electrode among the plurality of common electrodes.

Abstract: An in-plane switching mode LCD device and a method for manufacturing the same is disclosed, in which the in-plane switching mode LCD device includes a substrate; a plurality of common electrodes at fixed intervals in one direction on the substrate; an insulating layer on the substrate including the plurality of common electrodes; a plurality of pixel electrodes at fixed intervals on the insulating layer between the respective plurality of common electrodes; and a dummy common electrode on the insulating layer at one side of one of the pixel electrodes, wherein the dummy common electrode is electrically connected to an outermost common electrode among the plurality of common electrodes.

Abstract: Disclosed are an antler herb medicine and a preparing method thereof. The antler herb medicine is prepared by fermenting a mixture of antler and gizzard membrane at 20-60° C. In the mixture, the weight ratio of antler to gizzard membrane is within the range of 1:10 to 10:1. The antler herb medicine contains all of the efficacious components of antler, rather than selected components. Also, the fermentation of antler brings about a great change in the composition of antler, converting high molecular weight proteins into low molecular weight proteins and polypeptides, so that the antler herb medicine is greatly improved in uptake rate in the body. Thus, the antler herb medicine can show medicinal effects of antler at a small amount.

Abstract: On a semiconductor wafer, recognition marks are fabricated on the crossing points of scribe lines for the purpose of proper wafer alignment in wafer sawing process. Since the recognition mark has a distinctive pattern that is distinguished from other circuit patterns on the chip, the recognition mark can be easily recognized by a camera in a sawing apparatus, and reduce the chance of wafer misaligning. When a part of circuit pattern on the semiconductor chip is used for the alignment purpose, the chance of wafer misalignment relatively high due to the similarity between the part chosen and other parts of the circuit pattern. The present invention also provides a method for sawing the wafer using the recognition marks.

Abstract: On a semiconductor wafer, recognition marks are fabricated on the crossing points of scribe lines for the purpose of proper wafer alignment in wafer sawing process. Since the recognition mark has a distinctive pattern that is distinguished from other circuit patterns on the chip, the recognition mark can be easily recognized by a camera in a sawing apparatus, and reduce the chance of wafer misaligning. When a part of circuit pattern on the semiconductor chip is used for the alignment purpose, the chance of wafer misalignment relatively high due to the similarity between the part chosen and other parts of the circuit pattern. The present invention also provides a method for sawing the wafer using the recognition marks.

Abstract: A semiconductor chip packaging method includes the provision of individual elastomer chip carriers cut from an elastomer sheet having a uniform thickness and smooth, parallel surfaces. The elastomer sheet is mounted on an adhesive tape held by a fixing member, such as a support ring, and is then divided into individual carriers. The carrier is attached to a circuit interposer, and a semiconductor chip is attached to the carrier. Circuit leads of the interposer are bonded to connection pads on the chip. The beam lead bonding area is then encapsulated, and conductive bumps are formed on the underside of the package to serve as input/output terminals for the packaged device. Using this method, an number of devices can be packaged simultaneously on a flexible sheet and then separated into individual devices by cutting the sheet between the devices.