Abstract: The present invention is disclosed a microchannel array structure embedded in a silicon substrate and a fabrication method thereof. The microchannel array structure of the present invention is formed deep inside the substrate and has high-density microscopic micro-channels. Besides, going through surface micromachining, physical and chemical properties of the silicon substrate are hardly influenced by the fabrication procedures. With microchannels buried in the substrate, the top of a microchannel array structure becomes flat, minimizing the effect of step height. That way, additional devices such as passive components, micro sensors, micro actuators and electronic devices can be easily integrated onto the microchannel array structure.

Abstract: An enzyme electrode sensor and a fabricating method thereof, and more particularly, an enzyme electrode sensor which is a biosensor using electrochemical measurement and a manufacturing method thereof. The sensor includes an electrode, a first nonconducting polymer layer formed by electropolymerization outside the electrode wherein enzyme is immobilized in the nonconducting polymer layer, a second nonconducting polymer layer in which enzyme is not immobilized, the second nonconducting layer formed by electropolymerization outside the first nonconducting polymer layer, and an outer layer formed outside the second nonconducting layer. The sensor selectivity is improved as the interference of organic materials is inhibited, and the interference of acetaminophen causing the major problem with a glucose sensor is controlled effectively by the sensor.

Abstract: The disclosure concerns to an optical filter for use in an optical communication device such as a multiplexer and demultiplexer. The optical filter is a Fabry-Perot filter that is formed with a silicon substrate by using a silicon micromachining process and a silicon etching process. The optical filters are applied to various optical communication devices, such as multiplexer (MUX) or demultiplexer (DEMUX) In each of the optical communication devices, the optical filters are installed and integrated on the silicon substrate together with input/output optical fibers and collimating lenses, resulting in simplifying the manufacturing process thereof and, hence, in reducing the manufacturing cost thereof. Furthermore, each of the optical filters incorporates therein an actuator so as to be tunable (wavelength-selective) in the optical filtering function and to be capable of filtering more various wavelengths in a range.

Abstract: Disclosed is a a method of fabricating a MEMS device by means of surface micromachining without leaving any stiction or residues by etching silicon oxide of a sacrificial layer, which is an intermediate layer between a substrate and a microstructure, rather than by etching silicon oxide of a semiconductor device. The method according to the invention includes the steps of supplying alcohol vapor bubbled with anhydrous HF, maintaining a temperature of the supplying device and a moving path of the anhydrous HF and the alcohol to be higher than a boiling point of the alcohol, performing a vapor etching by controlling a temperature and a pressure to be within the vapor region of a phase equilibrium diagram of water, and removing silicon oxide of a sacrificial layer on a lower portion of the microstructure.

Abstract: A chemical vapor deposition apparatus and a copper film formation method are disclosed. The chemical vapor deposition apparatus includes a process gas delivery unit including a first storing unit using a liquid deposition source, a delivery unit for transferring a liquid deposition source in the first storing unit to an evaporator, and an evaporator for vaporizing the liquid deposition source transferred from the delivery unit and supplying a process gas; and a reaction chamber for receiving the process gas from the process gas delivery unit and deposition a predetermined thin film on a wafer or substrate mounted therein.

Abstract: An improved method for forming diffusion barrier layers for sub-micron connects in integrated circuits is disclosed. The dual diffusion barriers is easily formed according to two-step annealing processes. The anneal includes two anneal cycles or steps, each cycle is performed at a separate and distinct temperature cycles. Each cycle is performed in the presence of ammonia (NH3) or nitrogen ambient. As a result of the first low-temperature cycle, a nitridation occurs at the upper surface to form a binary diffusion barrier layer. As a result of the second high-temperature cycle, an out-diffusion of silicon ions occurs at the lower surface to form a ternary alloys. The dual diffusion barriers obtained by a simple and easy two-step anneal processing exhibits an improved barrier performance. Furthermore, it is possible to form highly stable multilevel interconnections without any deterioration problems by reducing the sophisticated processing steps.

Abstract: A three elemental compound for diffusion barrier layer having a superior diffusion barrier characteristics manufactured by forming the compound between the silicon diffused into the diffusion barrier layer and the two elemental compound for diffusion barrier layer before the metal wire layer penetrates into the diffusion barrier layer to reach the underlying silicon layer, using the different characteristics of the diffusion rate as above, is disclosed. A method of forming three elemental compound for diffusion barrier layer according to the present invention comprises a silicon substrate. A silicide layer is deposited on the silicon substrate. A refractory metal nitride layer is then deposited on the silicide layer. A metal wire layer is deposited on the refractory metal nitride layer.

Abstract: The present invention relates to a method for forming a diffusion barrier layer, the method comprising the steps of: forming an insulation membrane having an opening for exposing a diffusion region to a silicon substrate formed with the diffusion region of a predetermined conductivity; vacuum-evaporating a metal of high melting point to surface and sides of the insulation membrane and to an upper area of the diffusion region, to thereby form a metal layer; and forming on the metal layer a low resistance layer and a diffusion barrier layer according to first and second quick heating treatment steps under nitric or ammoniac atmosphere. Accordingly, the low resistance layer can be thinned out while the diffusion prevention layer can be quickly formed to thereby improve diffusion prevention characteristic and to reduce stress from an interface with the semiconductor substrate.

Abstract: A contact hole burying method is provided including the steps of: coating an oxide layer on a substrate and removing the oxide layer except for a portion thereof to form a contact hole extending through the oxide layer in electrical contact with the oxide layer; sequentially forming a metal barrier layer and wet layer on the oxide layer and inside the contact hole to form an electrical connection to the substrate; forming a conductive metal layer on the wet layer; removing impurity ions and oxide material, which remain in the conductive metal layer which decrease mobility of metal atoms on a surface of said conductive layer due to absorption and oxidation, by a cleaning-etching process using a plasma; and reflowing the conductive metal layer at a relatively low temperature in a reactive furnace where the cleaning-etching process is performed to completely fill the contact hole.