Abstract: According to a quantization interconnect apparatus and an operating method thereof according to the exemplary embodiment of the present disclosure, in a quantization artificial neural network accelerator system, the quantization is performed in the interconnect bus according to a precision without separate processing of the CPU/GPU so that as compared with the quantization by a host processor and an accelerator according to a quantization method of the related art, a number of instructions is reduced to improve the performance/memory efficiency. Further, a computational burden of the host process is reduced to reduce the power and improve the performance.

Abstract: A hybrid memory system may include: a volatile memory; a nonvolatile memory; and a memory controller configured to a threshold value for a read-to-write ratio according to a refresh interval of the volatile memory, and to perform migration of a page between the volatile memory and the nonvolatile memory based on the threshold value and a read-to-write ratio of the page.

Abstract: A hybrid memory system may include: a volatile memory; a nonvolatile memory; and a memory controller configured to a threshold value for a read-to-write ratio according to a refresh interval of the volatile memory, and to perform migration of a page between the volatile memory and the nonvolatile memory based on the threshold value and a read-to-write ratio of the page.