Patents by Inventor Young-Jin Choi

Young-Jin Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9449809
    Abstract: The present disclosure describes methods of an interface adhesion improvement methods used on a transparent substrate for OLED or thin film transistor applications. In one embodiment, a method of forming a buffer layer on a surface of a substrate includes providing a substrate having an planarization material disposed thereon in a processing chamber, supplying a buffer layer gas mixture including a silicon containing gas into the processing chamber, controlling a substrate temperature less than about 100 degrees Celsius, forming a buffer layer on the planarization material, supplying an encapsulating barrier layer deposition gas mixture including a silicon containing gas and a nitrogen containing gas into the processing chamber, and forming an encapsulating barrier layer on the buffer layer.
    Type: Grant
    Filed: July 20, 2013
    Date of Patent: September 20, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Young Jin Choi, Jrjyan Jerry Chen, Beom Soo Park, Soo Young Choi
  • Publication number: 20160268591
    Abstract: Disclosed are a negative electrode for a rechargeable lithium battery that includes a plurality of non-sheet-shaped graphite particles, at least one silicon-based particle in a void formed by assembling the non-sheet-shaped graphite particles, and a sheet-shaped graphite powder between the non-sheet-shaped graphite particles, the void, or both thereof, wherein a size of the silicon particle is smaller than a length of the longest axis of the sheet-shaped graphite powder.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 15, 2016
    Inventors: Young-Jin Choi, Yong-Chan You, Sang-Hyuck Ahn, Su-Kyung Lee, Deok-Hyun Kim, Xianhui Meng, Sang-Pil Kim
  • Patent number: 9418988
    Abstract: A four transistor layout can include an isolation region that defines an active region, the active region extending along first and second different directions. A common source region of the four transistors extends from a center of the active region along both the first and second directions to define four quadrants of the active region that are outside the common source region. Four drain regions are provided, a respective one of which is in a respective one of the four quadrants and spaced apart from the common source region. Finally, four gate electrodes are provided, a respective one of which is in a respective one of the four quadrants between the common source region and a respective one of the four drain regions. A respective gate electrode includes a vertex and first and second extending portions, the first extending portions extending from the vertex along the first direction and the second extending portions extending from the vertex along the second direction.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: August 16, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyo-Suk Chae, Satoru Yamada, Sang-Yeon Han, Young-Jin Choi, Wook-Je Kim
  • Publication number: 20160233501
    Abstract: A negative active material for a rechargeable lithium battery and a rechargeable lithium battery including the same are provided, and the negative active material includes a Si-based alloy; a first graphite material; and a second graphite material having a different average particle diameter from the first graphite material.
    Type: Application
    Filed: January 20, 2016
    Publication date: August 11, 2016
    Inventors: Su-Kyung LEE, Sang-Hyuck AHN, Deok-Hyun KIM, Xianhui MENG, Young Jin CHOI, Sang-Pil KIM, Yong-Chan YOU
  • Publication number: 20160190388
    Abstract: There is provided a semiconductor light emitting device including a first conductivity-type semiconductor base layer and a plurality of light emitting nanostructures disposed to be spaced apart from one another on the first conductivity-type semiconductor base layer, each light emitting nanostructure including a first conductivity-type semiconductor core, an active layer, an electric charge blocking layer, and a second conductivity-type semiconductor layer, respectively, wherein the first conductivity-type semiconductor core has different first and second crystal planes in crystallographic directions.
    Type: Application
    Filed: March 7, 2016
    Publication date: June 30, 2016
    Inventors: JIN SUB LEE, Jung Sub KIM, Sam Mook KANG, Yeon Woo SEO, Han Kyu SEONG, Dae Myung CHUN, Young Jin CHOI, Jae Hyeok HEO
  • Publication number: 20160126419
    Abstract: There is provided a semiconductor light-emitting device including a base layer formed of a first conductivity-type semiconductor material, and a plurality of light-emitting nanostructures disposed on the base layer to be spaced apart from each other, and including first conductivity-type semiconductor cores, active layers, and second conductivity-type semiconductor layers. The first conductivity-type semiconductor cores include rod layers extending upwardly from the base layer, and capping layers disposed on the rod layers. Heights of the rod layers are different in at least a portion of the plurality of light-emitting nanostructures, and heights of the capping layers are different in at least a portion of the plurality of light-emitting nanostructures.
    Type: Application
    Filed: October 22, 2015
    Publication date: May 5, 2016
    Inventors: Hyun Seong KUM, Dae Myung CHUN, Ji Hye YEON, Han Kyu SEONG, Jin Sub LEE, Young Jin CHOI, Jae Hyeok HEO
  • Patent number: 9312439
    Abstract: There is provided a semiconductor light emitting device including a first conductivity-type semiconductor base layer and a plurality of light emitting nanostructures disposed to be spaced apart from one another on the first conductivity-type semiconductor base layer, each light emitting nanostructure including a first conductivity-type semiconductor core, an active layer, an electric charge blocking layer, and a second conductivity-type semiconductor layer, respectively, wherein the first conductivity-type semiconductor core has different first and second crystal planes in crystallographic directions.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: April 12, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Sub Lee, Jung Sub Kim, Sam Mook Kang, Yeon Woo Seo, Han Kyu Seong, Dae Myung Chun, Young Jin Choi, Jae Hyeok Heo
  • Publication number: 20160099376
    Abstract: According to an example embodiment, a method of manufacturing a nanostructure semiconductor light-emitting device includes forming nanocores of a first-conductivity type nitride semiconductor material on abase layer to be spaced apart from each other, and forming a multilayer shell including an active layer and a second-conductivity type nitride semiconductor layers on surfaces of each of the nanocores. At least a portion the multilayer shell is formed by controlling at least one process parameter of a flux of source gas, a flow rate of source gas, a chamber pressure, a growth temperature, and a growth rate so as to have a higher film thickness uniformity.
    Type: Application
    Filed: September 28, 2015
    Publication date: April 7, 2016
    Inventors: Jae Hyeok HEO, Jin Sub LEE, Young Jin CHOI, Hyun Seong KUM, Ji Hye YEON, Dae Myung CHUN, Jung Sub KIM, Han Kyu SEONG
  • Patent number: 9287137
    Abstract: Embodiments of the disclosure generally provide methods of forming a silicon containing layers in TFT devices. The silicon can be used to form the active channel in a LTPS TFT or be utilized as an element in a gate dielectric layer, a passivation layer or even an etch stop layer. The silicon containing layer is deposited by a vapor deposition process whereby an inert gas, such as argon, is introduced along with the silicon precursor. The inert gas functions to drive out weak, dangling silicon-hydrogen bonds or silicon-silicon bonds so that strong silicon-silicon or silicon-oxygen bonds remain to form a substantially hydrogen free silicon containing layer.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: March 15, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Qunhua Wang, Weijie Wang, Young Jin Choi, Seon-Mee Cho, Yi Cui, Beom Soo Park, Soo Young Choi
  • Patent number: 9269865
    Abstract: A nanostructure semiconductor light emitting device may include a first conductivity-type semiconductor base layer, a mask layer disposed on the base layer and having a plurality of openings exposing portions of the base layer, a plurality of light emitting nanostructures disposed in the plurality of openings, and a polycrystalline current suppressing layer disposed on the mask layer. At least a portion of the polycrystalline current suppressing layer is disposed below the second conductivity-type semiconductor layer. Each light emitting nanostructure includes a first conductivity-type semiconductor nanocore, an active layer, and a second conductivity-type semiconductor layer.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: February 23, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae Myung Chun, Jung Sub Kim, Jin Sub Lee, Sam Mook Kang, Yeon Woo Seo, Han Kyu Seong, Young Jin Choi, Jae Hyeok Heo
  • Patent number: 9269923
    Abstract: A method and apparatus for depositing an inorganic layer onto a substrate is described. The inorganic layer may be part of an encapsulating film utilized in various display applications. The encapsulating film includes one or more inorganic layers as barrier layers to improve water-barrier performance. An oxygen containing gas, such as nitrous oxide, is introduced during the deposition of the inorganic layer. As a result, the inorganic layer is lower in stress and may obtain a water vapor transmission rate (WVTR) of less than 100 mg/m2-day.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: February 23, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Young Jin Choi, Beom Soo Park, Soo Young Choi
  • Patent number: 9261990
    Abstract: A hybrid touch screen device applied to an electric device. The hybrid touch screen device preferably includes a touch panel, a pen touch panel, a display panel, and at least one processor. The touch panel detects an input event by a direct touch. The pen touch panel detects a touch pen input and an input event from an entry into a predetermined detection distance before a touch. The display panel displays a screen according to the touch panel, the pen touch panel, and a user operation. The processor also performs control to execute a relevant function according to an input event inputted to the touch panel and the pen touch panel. The processor also performs control so that an input event of the touch pen and an input event of the touch panel are detected independently of each other.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: February 16, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Jin Choi, Ho-Seung Shin, Ju-Seung Lee
  • Patent number: 9257605
    Abstract: A method of manufacturing a light emitting device having a plurality of nano-light emitting structures is provided. The method comprises depositing a first conductivity-type semiconductor material on a substrate to form a base layer. A mask having a plurality of openings is formed on the base layer. The first conductivity-type nitride semiconductor material is deposited in the openings of the mask to form a plurality of nanocores having a main portion bounded by the mask and an exposed tip portion. A current blocking layer is deposited on the tip portion of the nanocores. A portion of the mask is removed to expose the main portion of the nanocore. An active material layer is deposited on the plurality of nanocores. A second conductivity-type nitride semiconductor layer is deposited on the active material layer.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: February 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeon Woo Seo, Jung-Sub Kim, Young Jin Choi, Denis Sannikov, Han Kyu Seong, Dae Myung Chun, Jae Hyeok Heo
  • Publication number: 20160013365
    Abstract: A method for manufacturing a semiconductor light emitting device may include steps of forming a mask layer and a mold layer having a plurality of openings exposing portions of a base layer, forming a plurality of first conductivity-type semiconductor cores each including a body portion extending through each of the openings from the base layer and a tip portion disposed on the body portion and having a conical shape, and forming an active layer and a second conductivity-type semiconductor layer on each of the plurality of first conductivity-type semiconductor cores. The step of forming the plurality of first conductivity-type semiconductor cores may include forming a first region such that a vertex of the tip portion is positioned on a central vertical axis of the body portion, removing the mold layer, and forming an additional growth region on the first region such that the body portion has a hexagonal prism shape.
    Type: Application
    Filed: February 20, 2015
    Publication date: January 14, 2016
    Inventors: Dae Myung CHUN, Ji Hye YEON, Jae Hyeok HEO, Hyun Seong KUM, Han Kyu SEONG, Young Jin CHOI
  • Publication number: 20160013362
    Abstract: There is provided a nanostructure semiconductor light-emitting device including a base layer formed of a first conductivity-type semiconductor, an insulating layer disposed on the base layer and having a plurality of openings, and a plurality of light-emitting nanostructures disposed the plurality of openings, respectively. Each of light-emitting nanostructures includes a nanocore formed of a first conductivity-type semiconductor, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore. The plurality of light-emitting nanostructures are formed through the same growth process and divided into n groups (where n is an integer of two or more), each of which having at least two light-emitting nanostructures. At least one of a diameter, a height, and a pitch of the nanocores is different by group so that the active layers emit light having different wavelengths by group.
    Type: Application
    Filed: June 26, 2015
    Publication date: January 14, 2016
    Inventors: Jae Hyeok HEO, Jung Sub KIM, Young Jin CHOI, Jin Sub LEE, Sam Mook KANG, Yeon Woo SEO, Han Kyu SEONG, Dae Myung CHUN
  • Patent number: 9230796
    Abstract: Embodiments of the present invention provide methods for depositing a nitrogen-containing material on large-sized substrates disposed in a processing chamber. In one embodiment, a method includes processing a batch of substrates within a processing chamber to deposit a nitrogen-containing material on a substrate from the batch of substrates, and performing a seasoning process at predetermined intervals during processing the batch of substrates to deposit a conductive seasoning layer over a surface of a chamber component disposed in the processing chamber. The chamber component may include a gas distribution plate fabricated from a bare aluminum without anodizing. In one example, the conductive seasoning layer may include amorphous silicon, doped amorphous silicon, doped silicon, doped polysilicon, doped silicon carbide, or the like.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: January 5, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Gaku Furuta, Soo Young Choi, Beom Soo Park, Young-jin Choi, Omori Kenji
  • Publication number: 20150306704
    Abstract: Disclosed are a gas-penetration film which is fabricated by processing grooves by irradiating a pulsed laser beam onto a moving film, an apparatus of fabricating the same, and a method of fabricating the same. A method of fabricating a gas-penetration film which irradiates a pulsed laser beam onto a moving film to continuously process grooves, includes splitting the pulsed laser beam; irradiating split pulsed laser beams onto the moving film at a constant interval to process multi-grooves; and controlling a movement speed of the moving film so as to repeatedly process a groove, which is adjacent to the groove processed by the split pulsed laser beam, by the pulsed laser beam. Therefore, the groove processings are repeatedly performed on the same groove to increase a depth of the groove.
    Type: Application
    Filed: July 10, 2012
    Publication date: October 29, 2015
    Inventors: Ik Bu SOHN, Young Chul NOH, Young Jin CHOI
  • Publication number: 20150303350
    Abstract: A method of manufacturing a light emitting device having a plurality of nano-light emitting structures is provided. The method comprises depositing a first conductivity-type semiconductor material on a substrate to form a base layer. A mask having a plurality of openings is formed on the base layer. The first conductivity-type nitride semiconductor material is deposited in the openings of the mask to form a plurality of nanocores having a main portion bounded by the mask and an exposed tip portion. A current blocking layer is deposited on the tip portion of the nanocores. A portion of the mask is removed to expose the main portion of the nanocore. An active material layer is deposited on the plurality of nanocores. A second conductivity-type nitride semiconductor layer is deposited on the active material layer.
    Type: Application
    Filed: July 2, 2015
    Publication date: October 22, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeon Woo SEO, Jung-Sub KIM, Young Jin CHOI, Denis SANNIKOV, Han Kyu SEONG, Dae Myung CHUN, Jae Hyeok HEO
  • Publication number: 20150265333
    Abstract: There are provided a system for ablation utilizing multiple electrodes and a method for controlling the system. The system includes: a main amplification unit providing main radio frequency (RF) power by amplifying received power; a sub-amplification unit providing sub-RF power by amplifying received power; a first switching unit transmitting the main RF power provided by the main amplification unit to one of first to third electrodes; a second switching unit transmitting the sub-RF power provided by the sub-amplification unit to one of the first to third electrodes; and a control unit controlling the first and second switching units to apply the main RF power and the sub-RF power to a pair of respective electrodes previously selected from the first to third electrodes.
    Type: Application
    Filed: October 2, 2013
    Publication date: September 24, 2015
    Inventors: Kyong-Min Shin, Kyung-Hoon Shin, Jun-Hyok Lee, Young-Jin Choi, Jung-Hyuk Zu, Kye-Joo Kim
  • Publication number: 20150236202
    Abstract: A nanostructure semiconductor light emitting device may include a first conductivity-type semiconductor base layer, a mask layer disposed on the base layer and having a plurality of openings exposing portions of the base layer, a plurality of light emitting nanostructures disposed in the plurality of openings, and a polycrystalline current suppressing layer disposed on the mask layer. At least a portion of the polycrystalline current suppressing layer is disposed below the second conductivity-type semiconductor layer. Each light emitting nanostructure includes a first conductivity-type semiconductor nanocore, an active layer, and a second conductivity-type semiconductor layer.
    Type: Application
    Filed: October 16, 2014
    Publication date: August 20, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae Myung CHUN, Jung Sub KIM, Jin Sub LEE, Sam Mook KANG, Yeon Woo SEO, Han Kyu SEONG, Young Jin Choi, Jae Hyeok HEO