Abstract: A semiconductor memory device includes: a reference voltage generation unit configured to generate first and second reference voltages, wherein a level of the first reference voltage increases with decreasing internal temperature, and a level of the second reference voltage decreases with decreasing internal temperature; and a level control unit configured to control an internal voltage in response to the first and second reference voltages so as to decrease the absolute value of the internal voltage.

Abstract: The present invention provides a pharmaceutical composition for treating cancer, comprising at least one selected from deoxyribonucleic acids (DNA) for encoding small interfering RNA (siRNA) which complementarily binds to the base sequence of the transcript (mRNA transcript) of the FLJ25416 gene, represented by sequence number 3, sequence number 5, and sequence number 7 to inhibit the intracellular expression of the FLJ25416 gene, antisense RNA which inhibits expression of the FLJ25416 gene, and short hairpin RNA (shRNA) which inhibits expression of the FLJ25416 gene. As the siRNA, which is complementary to the base sequence of the transcript (mRNA transcript) of the FLJ25416 gene, the antisense RNA, and the shRNA, according to the present invention, inhibit expression of the FLJ25416 gene which is known to be expressed in cancer cells, and thus kill cancer cells, the composition of the present invention can be used as a novel anti-cancer agent.

Abstract: An organic light emitting diode display device includes: a switching thin film transistor in a pixel region, the switching thin film transistor including a switching semiconductor layer of polycrystalline silicon; a driving thin film transistor connected to the switching thin film transistor, the driving thin film transistor including a driving semiconductor layer of polycrystalline silicon layer; and a light emitting diode connected to the driving thin film transistor, wherein a direction of a channel of the switching thin film transistor is parallel to a first direction, and a direction of a channel of the driving thin film transistor is perpendicular to the first direction.

Abstract: A method for fabricating is provided for a liquid crystal display device capable of decreasing the number of masks used to fabricate a thin film transistor (TFT) by forming an active pattern and a storage electrode by a single mask process, by simultaneously patterning a pixel electrode at the time of a gate line patterning, and by using only an organic insulation layer having a low dielectric constant.

Abstract: A method for fabricating is provided for a liquid crystal display device capable of decreasing the number of masks used to fabricate a thin film transistor (TFT) by forming an active pattern and a storage electrode by a single mask process, by simultaneously patterning a pixel electrode at the time of a gate line patterning, and by using only an organic insulation layer having a low dielectric constant.

Abstract: There is provided a switching mode power supply having multiple outputs, including: a DC/DC converter converting a DC voltage level according to a change in a load and including a primary coil and a secondary coil; a boost unit boosting an output voltage of the DC/DC converter in a first mode and outputting the boosted output voltage to an output terminal; a bypass unit bypassing the output voltage of the DC/DC converter in a second mode, to output the bypassed voltage to the output terminal; and a boosting controller controlling the boost unit according to a voltage detected at a center tab of the secondary coil of the DC/DC converter.

Abstract: An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.

Abstract: The present invention relates to the elucidation of a gene that can act as a novel marker for liver cancer diagnosis and to diagnostic and prognostic measurements of liver cancer using the same. More specifically, it relates to a diagnosis kit that enables diagnostic and prognostic measurement of a liver cancer using a preparation that measures expression levels of at least one gene selected from a group of liver cancer diagnosis markers consisting of S100P, NK4, CCL20, CSPG2, PLAU, MMP12, ESM-1, ABHD7, HCAPG, CXCL-3, Col5A2, MAGEA, GSN, CDC2, CST1, MELK, ATAD2, FAP and MSN and/or a method for diagnostic and prognostic measurement of liver cancer using the same. These have been discovered using normal liver tissues and liver cancer tissues collected from the same liver cancer patient of the present invention and represent the markers whose accuracy and reliability have been greatly improved as markers of liver cancer.

Abstract: A fuel preprocess system for a coal combustion boiler is disclosed. The fuel preprocess system for a coal combustion boiler that dries biomass or refuse-derived fuel in accordance with the present invention can include: a dryer configured to dry the biomass or refuse-derived fuel by use of flue gas generated after combustion in the boiler; and a torrefier configured to devolatilize a fibrous component contained in the dried fuel from the fuel dried in the dryer by use of primary air that is heat-exchanged after the combustion in the boiler.

Abstract: A pipe latch circuit comprises a reset signal generating unit which receives a read-write flag signal and a read period signal and generates a reset signal, wherein the reset signal is enabled upon entry into a write operation or after all data are outputted to an outside upon read operation, an input/output control signal generating unit which generates a plurality of input control signals and output control signals in response to a read strobe signal and a clock signal, and is reset in response to the reset signal, and a pipe latch unit which latches inputted data in response to the input control signals and outputs the latched data in response to the output control signals.

Abstract: An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.

Abstract: An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.

Abstract: Provided are a composition for diagnosing cancer or screening an anticancer drug comprising an FLJ25416 gene or an antibody directed to a protein expressed from the FLJ25416 gene, a composition for treating cancer comprising an inhibitor of the gene or an inhibitor of the protein expressed from the gene and a pharmaceutically acceptable carrier, and a kit for diagnosing cancer comprising at least one of the FLJ25416 gene and the protein expressed from the FLJ25416 gene. The FLJ25416 gene is expressed at high level in specific cancer cells, and induces an increase in proliferation rate of normal cells. The expression of the gene is suppressed, which results in an inhibitory effect on cancer cell growth. Thus, the FLJ25416 gene can be used as a target gene for diagnosis or treatment of cancer.

Abstract: An embodiment of a laser crystallization method includes providing a substrate on which an amorphous silicon thin film is deposited, positioning a laser mask over the substrate, the laser mask including a mask pattern that contains transmitting regions and a blocking region, irradiating a first laser beam onto a surface of the substrate through the pattern of the laser mask to first crystallize a predetermined region of the silicon thin film, moving the laser mask or a stage on which the substrate is loaded in an X-axis direction to perform second crystallization using the laser mask, repeatedly performing the crystallization to an end of the substrate in the X-axis direction, moving the laser mask or the stage in a Y-axis direction, and repeatedly performing the crystallization in the Y-axis direction to complete crystallization.

Abstract: A silicon crystallization method renders it is possible to form alignment key without additional photolithography, and to adjust a substrate to a correct position by sensing a deviation of the substrate when the substrate is loaded. The silicon crystallization method includes aligning the substrate by sensing a fixed substrate with a sensing device, and moving and/or rotating a stage, wherein the sensing device faces toward an edge of the substrate to directly sense the edge of the substrate; forming alignment keys on predetermined portions of a non-display area of the substrate by correspondingly placing a mask for formation of an alignment key above the substrate; and crystallizing an amorphous silicon by correspondingly providing a mask for crystallization above the substrate.

Abstract: A pipe latch circuit comprises a reset signal generating unit which receives a read-write flag signal and a read period signal and generates a reset signal, wherein the reset signal is enabled upon entry into a write operation or after all data are outputted to an outside upon read operation, an input/output control signal generating unit which generates a plurality of input control signals and output control signals in response to a read strobe signal and a clock signal, and is reset in response to the reset signal, and a pipe latch unit which latches inputted data in response to the input control signals and outputs the latched data in response to the output control signals.

Abstract: A method for fabricating a liquid crystal display (LCD) device includes providing a first substrate including a pixel portion and a circuit portion, the circuit portion having first and second regions; forming an active pattern and a first gate insulation film at the pixel portion and the circuit portion and forming a storage electrode on a portion of the active pattern of the pixel portion; forming a second gate insulation film on the first substrate; forming a gate electrode at the first region and forming p+ source and drain regions at portions of the active pattern of the first region; forming a gate electrode at the pixel portion and the second region, and forming a common line at the pixel portion; forming n+ source and drain regions at the pixel portion and at a portion of the active pattern of the second region; and joining the first and second substrates.

Abstract: A method of crystallizing amorphous silicon includes forming an amorphous silicon film over a substrate, crystallizing the amorphous silicon film to form a polycrystalline silicon film using a sequential lateral solidification crystallization method, and performing a surface treatment to the polycrystalline silicon film, wherein the sequential lateral solidification crystallization method includes at least a first application of a first laser beam having a first energy density that completely melts a first uncrystallized portion of the amorphous silicon film and melts a first crystallized portion of the amorphous silicon film, and the surface treatment includes application of a second laser beam having a second energy density that partially melts an entire surface of the polycrystalline silicon film.

Abstract: A crystallization method and system are provided which improve a crystallization process by deciding a best-fit focal plane for a laser beam using a test mask and then applying the decided best-fit focal plane to the crystallization process. The crystallization method includes loading a test mask on a mask stage; deciding a best-fit focal plane by performing a crystallization test using the test mask, checking the test result and deciding conditions of a best-fit focal plane from the test result; moving the mask stage to a position corresponding to the best-fit focal plane; loading a mask for crystallization process onto the moved mask stage; and performing the crystallization process using the mask for crystallization process.

Abstract: A novel silicon crystallization apparatus and a silicon crystallization method renders it is possible to form alignment key without additional photolithography, and to adjust a substrate to a correct position by sensing a deviation of the substrate when the substrate is loaded. The silicon crystallization apparatus includes a moving stage being moved in a horizontal direction, and a fixing plate provided in the moving stage, to fix a substrate. A rotating frame is provided in the moving stage, to rotate the fixing plate.