Patents by Inventor Young Min Na

Young Min Na has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180286806
    Abstract: A method of manufacturing a semiconductor device includes forming a stacked structure including at least one interconnection pattern layer and at least one contact plug on over a substrate, forming an interlayer insulation material layer over an uppermost interconnection pattern layer or an uppermost contact plug of the stacked structure, patterning the interlayer insulation layer to form an interlayer insulation layer including one or more openings that expose the uppermost interconnection pattern layer or the uppermost contact plug, forming a metal nitride thin film along a surface of a resulting structure of the interlayer insulation layer, forming a metal thin film over the metal nitride thin film by filling at least the remaining portions of the one or more openings after the metal nitride thin film is formed, and planarizing the metal thin film and the metal nitride thin film using chemical mechanical polishing.
    Type: Application
    Filed: November 28, 2017
    Publication date: October 4, 2018
    Inventors: In Hoe KIM, Young Min NA, Gwang Won LEE, Jong Young CHO
  • Patent number: 10042767
    Abstract: An electronic device is provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a substrate including a first region in which a plurality of memory cells are disposed and a second region adjacent to the first region; a first interlayer insulating layer disposed over the substrate; a plurality of first memory cells penetrating through the first interlayer insulating layer in the first region, an uppermost portion of each memory cell of the first memory cells having a first conductive carbon-containing pattern; and a first insulating carbon-containing pattern located over the first interlayer insulating layer in the second region.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: August 7, 2018
    Assignee: SK hynix Inc.
    Inventors: Jong-Young Cho, Eung-Rim Hwang, In-Hoe Kim, Young-Min Na, Gwang-Won Lee
  • Publication number: 20180018263
    Abstract: An electronic device is provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes: a substrate including a first region in which a plurality of memory cells are disposed and a second region adjacent to the first region; a first interlayer insulating layer disposed over the substrate; a plurality of first memory cells penetrating through the first interlayer insulating layer in the first region, an uppermost portion of each memory cell of the first memory cells having a first conductive carbon-containing pattern; and a first insulating carbon-containing pattern located over the first interlayer insulating layer in the second region.
    Type: Application
    Filed: March 14, 2017
    Publication date: January 18, 2018
    Inventors: Jong-Young CHO, Eung-Rim HWANG, In-Hoe KIM, Young-Min NA, Gwang-Won LEE
  • Patent number: 7892069
    Abstract: A loading device of chemical mechanical polishing (CMP) equipment for processing semiconductor wafers is provided. The loading device includes a loading cup having a cup-like bath, a cup plate installed in the bath, and a loading plate supported on the cup plate for absorbing shock and seating the wafer. A driving device and a driving shaft horizontally pivot and vertically move the loading cup between a platen of a polishing apparatus and a spindle. An arm connects the loading cup and the driving shaft. At least one through hole is located in a mutually corresponding position of the bath, the cup plate, and the loading plate of the loading cup. A probe assembly optically detects a polished thickness at a polished point on the wafer.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: February 22, 2011
    Assignee: K.C. Tech Co., Ltd.
    Inventors: Young Min Na, Chang Il Kim, Young Su Heo
  • Publication number: 20090130955
    Abstract: A loading device of chemical mechanical polishing (CMP) equipment for processing semiconductor wafers is provided. The loading device includes a loading cup having a cup-like bath, a cup plate installed in the bath, and a loading plate supported on the cup plate for absorbing shock and seating the wafer. A driving device and a driving shaft horizontally pivot and vertically move the loading cup between a platen of a polishing apparatus and a spindle. An arm connects the loading cup and the driving shaft. At least one through hole is located in a mutually corresponding position of the bath, the cup plate, and the loading plate of the loading cup. A probe assembly optically detects a polished thickness at a polished point on the wafer.
    Type: Application
    Filed: July 21, 2006
    Publication date: May 21, 2009
    Applicant: DOOSAN MECATEC CO., LTD.
    Inventors: Young Min Na, Chang Il Kim, Young Su Heo
  • Publication number: 20040067998
    Abstract: The present invention relates to novel indole derivatives, their method of preparation and their pharmacological activity as antimycotic and/or antiparasitic compounds.
    Type: Application
    Filed: July 25, 2003
    Publication date: April 8, 2004
    Inventors: Marc Le Borgne, Young Min Na, Fabrice Pagniez, Guillaume Le Baut, Patrice Le Pape, Hiam Abdala