Patents by Inventor Youngseob Suh

Youngseob Suh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for channel equalization based on error detection
    Patent number: 11711245
    Abstract: An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: July 25, 2023
    Assignees: SAMSUNG ELECTRONICS CO., LTD., RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Youngseob Suh, Byungwook Cho, Donghyuk Lim, Junghoon Chun
  • APPARATUS AND METHOD FOR CHANNEL EQUALIZATION BASED ON ERROR DETECTION
    Publication number: 20220086028
    Abstract: An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.
    Type: Application
    Filed: April 29, 2021
    Publication date: March 17, 2022
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Youngseob Suh, Byungwook Cho, Donghyuk Lim, Junghoon Chun