Abstract: The invention provides a bond wire arrangement comprising a signal bond wire (1) for operably connecting a first electronic device (6) to a second electronic device (8), and a control bond wire (2) being arranged alongside the signal bond wire at a distance so as to have a magnetic coupling with the signal bond wire (1), and having a first end (11) coupled to ground, and a second end (12) coupled to ground via a resistive element (14). The proposed solution allows the control of the Q factor (losses) of wire bond inductors during assembly phase, which will save time and reduce overall design cycle as compared to known methods.

Abstract: The invention provides a bond wire arrangement comprising a signal bond wire (1) for operably connecting a first electronic device (6) to a second electronic device (8), and a control bond wire (2) being arranged alongside the signal bond wire at a distance so as to have a magnetic coupling with the signal bond wire (1), and having a first end (11) coupled to ground, and a second end (12) coupled to ground via a resistive element (14). The proposed solution allows the control of the Q factor (losses) of wire bond inductors during assembly phase, which will save time and reduce overall design cycle as compared to known methods.

Abstract: The invention provides a bond wire arrangement comprising a signal bond wire (1) for operably connecting a first electronic device (6) to a second electronic device (8), and a control bond wire (2) being arranged alongside the signal bond wire at a distance so as to have a magnetic coupling with the signal bond wire (1), and having a first end (11) coupled to ground, and a second end (12) coupled to ground via a resistive element (14). The proposed solution allows the control of the Q factor (losses) of wire bond inductors during assembly phase, which will save time and reduce overall design cycle as compared to known methods.

Abstract: An integrated matching circuits for a high frequency amplifier transistor having an input terminal, an output terminal and a reference terminal. The reference terminal is coupled to a reference potential. The integrated matching circuit comprises an inductive element, and a capacitive element arranged in a series arrangement with the inductive element. The series arrangement has a first terminal end connected to the input terminal or to the output terminal and a second terminal end connected to the reference terminal. The first terminal end and the second terminal end are arranged at a same lateral side of the integrated matching circuit to obtain a geometry with the first terminal end adjacent to the input terminal or to the output terminal and the second terminal end adjacent to the reference terminal.

Abstract: A high frequency amplifier includes a high frequency amplifier transistor integrated in a first die of a first semiconductor technology and a matching circuit. The high frequency amplifier transistor has an input terminal, an output terminal and a reference terminal. The reference terminal is coupled to a reference potential. The matching circuit includes at least a first inductive bondwire, a second inductive bondwire and a capacitive element arranged in series with said inductive bondwires. The capacitive element is integrated in a second die of a second semiconductor technology different from the first semiconductor technology. The second semiconductor technology includes an isolating substrate for conductively isolating the capacitive element from a support attached at a first side to the second die. The capacitive element includes a first plate electrically coupled to a first bondpad of the second die and a second plate electrically coupled to a second bondpad of the second die.

Abstract: The invention provides a bond wire arrangement comprising a signal bond wire (1) for operably connecting a first electronic device (6) to a second electronic device (8), and a control bond wire (2) being arranged alongside the signal bond wire at a distance so as to have a magnetic coupling with the signal bond wire (1), and having a first end (11) coupled to ground, and a second end (12) coupled to ground via a resistive element (14). The proposed solution allows the control of the Q factor (losses) of wire bond inductors during assembly phase, which will save time and reduce overall design cycle as compared to known methods.

Abstract: A RF power amplifier module comprises a die with a RF power transistor and the RF power transistor comprises a control terminal, a transistor output terminal and a transistor reference terminal. The RF power amplifier module further comprises a module input terminal, a module output terminal and at least two module reference terminals being electrically coupled to the control terminal, the transistor output terminal and the transistor reference terminal, respectively. The RF power amplifier module further comprises an electrically isolating layer and a heat conducting element. The die is in thermal contact with the heat conducting element via the electrically isolating layer in order to transfer heat during operation of the RF power transistor to the heat conducting element.

Abstract: A high frequency amplifier includes a high frequency amplifier transistor integrated in a first die of a first semiconductor technology and a matching circuit. The high frequency amplifier transistor has an input terminal, an output terminal and a reference terminal. The reference terminal is coupled to a reference potential. The matching circuit includes at least a first inductive bondwire, a second inductive bondwire and a capacitive element arranged in series with said inductive bondwires. The capacitive element is integrated in a second die of a second semiconductor technology different from the first semiconductor technology. The second semiconductor technology includes an isolating substrate for conductively isolating the capacitive element from a support attached at a first side to the second die. The capacitive element includes a first plate electrically coupled to a first bondpad of the second die and a second plate electrically coupled to a second bondpad of the second die.

Abstract: An integrated matching circuits for a high frequency amplifier transistor having an input terminal, an output terminal and a reference terminal. The reference terminal is coupled to a reference potential. The integrated matching circuit comprises an inductive element, and a capacitive element arranged in a series arrangement with the inductive element. The series arrangement has a first terminal end connected to the input terminal or to the output terminal and a second terminal end connected to the reference terminal. The first terminal end and the second terminal end are arranged at a same lateral side of the integrated matching circuit to obtain a geometry with the first terminal end adjacent to the input terminal or to the output terminal and the second terminal end adjacent to the reference terminal.

Abstract: A wireless communication unit comprising a transmitter comprises: a linearization circuit arranged to receive and digitally distort an input signal; a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal; a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit; a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.

Abstract: A wireless communication unit comprising a transmitter comprises: a linearization circuit arranged to receive and digitally distort an input signal; a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal; a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit; a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.

Abstract: A RF power amplifier module comprises a die with a RF power transistor and the RF power transistor comprises a control terminal, a transistor output terminal and a transistor reference terminal. The RF power amplifier module further comprises a module input terminal, a module output terminal and at least two module reference terminals being electrically coupled to the control terminal, the transistor output terminal and the transistor reference terminal, respectively. The RF power amplifier module further comprises an electrically isolating layer and a heat conducting element. The die is in thermal contact with the heat conducting element via the electrically isolating layer in order to transfer heat during operation of the RF power transistor to the heat conducting element.