Patents by Inventor Yousuke Kuroiwa

Yousuke Kuroiwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100283474
    Abstract: A test circuit for testing not only characteristics of a current-voltage conversion circuit in which a light-receiving element is used but also characteristics of the light-receiving element includes: a current-mirror circuit 110 including a bipolar transistor Q1 and a bipolar transistor Q2 which are electrically connected to a light-receiving element PD1; a dummy light-receiving element PD_D which is an element identical to the light-receiving element PD1 and is equivalent in characteristics to the light-receiving element PD1; and a test terminal TP which is electrically connected to the bipolar transistor Q1 and the dummy light-receiving element PD_D.
    Type: Application
    Filed: April 14, 2010
    Publication date: November 11, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Hideo FUKUDA, Masaki TANIGUCHI, Shinichi MIYAMOTO, Yousuke KUROIWA
  • Patent number: 7545156
    Abstract: The test circuit according to the present invention includes: a plurality of light-receiving elements; a plurality of amplifiers, each of which converts, into a voltage, a photoelectric current supplied from one of the light-receiving elements; and an electric current supplying unit which supplies an electric current to each of the light-receiving elements and each of the amplifiers.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: June 9, 2009
    Assignee: Panasonic Corporation
    Inventors: Yousuke Kuroiwa, Hideo Fukuda, Hiroshi Yamaguchi, Tetsuo Chato, Yuzo Shimizu, Masaki Taniguchi
  • Patent number: 7391265
    Abstract: An amplifier unit is provided, with which the need for manufacturing a photoelectric conversion IC in Bi-CMOS process is eliminated, and relatively low process cost of the photoelectric conversion IC is achieved. The input section of a buffer (the base of a transistor Q5) is connected with a plurality of patterns of phase compensation circuits each including a resistor and a capacitor connected in series. A bipolar transistor (Q6) is interposed between a positive power supply line and a capacitor (C2) forming a capacitance of the phase compensation circuit. By switching on/off the bipolar transistor (Q6), the capacitance value and resistance value of the phase compensation circuit are switched. Since the bipolar transistor (Q6) is interposed between the capacitor (C2) and the positive power supply line, base current (Isw) acting as a switch signal does not affect the amplifier unit.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: June 24, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Miyamoto, Yousuke Kuroiwa, Masaya Ueda, Hideo Fukuda, Hiroshi Yamaguchi, Masaki Taniguchi
  • Publication number: 20070252602
    Abstract: The test circuit according to the present invention includes: a plurality of light-receiving elements; a plurality of amplifiers, each of which converts, into a voltage, a photoelectric current supplied from one of the light-receiving elements; and an electric current supplying unit which supplies an electric current to each of the light-receiving elements and each of the amplifiers.
    Type: Application
    Filed: February 21, 2007
    Publication date: November 1, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yousuke KUROIWA, Hideo FUKUDA, Hiroshi YAMAGUCHI, Tetsuo CHATO, Yuzo SHIMIZU, Masaki TANIGUCHI
  • Publication number: 20060202761
    Abstract: An amplifier unit is provided, with which the need for manufacturing a photoelectric conversion IC in Bi-CMOS process is eliminated, and relatively low process cost of the photoelectric conversion IC is achieved. The input section of a buffer (the base of a transistor Q5) is connected with a plurality of patterns of phase compensation circuits each including a resistor and a capacitor connected in series. A bipolar transistor (Q6) is interposed between a positive power supply line and a capacitor (C2) forming a capacitance of the phase compensation circuit. By switching on/off the bipolar transistor (Q6), the capacitance value and resistance value of the phase compensation circuit are switched. Since the bipolar transistor (Q6) is interposed between the capacitor (C2) and the positive power supply line, base current (Isw) acting as a switch signal does not affect the amplifier unit.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 14, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Miyamoto, Yousuke Kuroiwa, Masaya Ueda, Hideo Fukuda, Hiroshi Yamaguchi, Masaki Taniguchi
  • Patent number: 6806115
    Abstract: A method for producing a semiconductor light emitting device includes the steps of forming a mask layer having a plurality of openings on a surface of a silicon substrate; and forming a column-like multi-layer structure including a light emitting layer in each of the plurality of openings with nitride semiconductor materials. A width between two adjacent openings of the plurality of openings of the mask layer is 10 &mgr;m or less.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: October 19, 2004
    Assignees: Sharp Kabushiki Kaisha
    Inventors: Norikatsu Koide, Junji Yamamoto, Tsuyoshi Dohkita, Nobuhiko Sawaki, Yoshio Honda, Yousuke Kuroiwa, Masahito Yamaguchi
  • Publication number: 20030087462
    Abstract: A method for producing a semiconductor light emitting device includes the steps of forming a mask layer having a plurality of openings on a surface of a silicon substrate; and forming a column-like multi-layer structure including a light emitting layer in each of the plurality of openings with nitride semiconductor materials. A width between two adjacent openings of the plurality of openings of the mask layer is 10 &mgr;m or less.
    Type: Application
    Filed: October 30, 2002
    Publication date: May 8, 2003
    Inventors: Norikatsu Koide, Junji Yamamoto, Tsuyoshi Dohkita, Nobuhiko Sawaki, Yoshio Honda, Yousuke Kuroiwa, Masahito Yamaguchi