Abstract: An ATM switch that can be expanded to form a large scale ATM switch with minimal hardware additions. The ATM switch includes a plurality of ATM switch units arranged in parallel, a plurality of cell distributors arranged on the input side of the ATM switch units, and a plurality of cell assemblers arranged on the output side of the ATM switch units. Each of the cell distributors distributes ATM cells received from a plurality of incoming highways to a buffer memory having a plurality of queues corresponding to the output ports of the ATM switch units, namely destinations of the ATM cells, and stores the ATM cells to the queues in the buffer memory. Each cell distributor reads ATM cells having the same destination information, and outputs such ATM cells to respective ones of the ATM switch units in parallel. Each of the ATM switch units independently exchanges the received ATM cell in parallel with the other ATM switch units.

Abstract: In a switching system connected between a plurality of input lines and a plurality of output lines, destinations of a plurality of cells incoming from the plurality of input lines are monitored to detect an output line in a congestion state. Upon detection of the output line in an congestion state, congestion information indicating the output line in the congestion state is generated and added to the output cells. An input buffer control circuit derives the congestion information from the received cell, and performs buffering of a cell or cells in an input buffer, which cells are distributed to the output line in the congested state, among cells input from the input line.

Abstract: A cell multiplexer includes a multiplexing unit for time-divisionally multiplexing ATM cell signals given from a plurality of input lines, a write controller for storing cell signals outputted from the multiplexing unit in a buffer memory successively correspondingly to the input lines, a read controller for reading the cell signals stored in the buffer memory from the buffer memory in the form of data blocks synchronized with an ATM cell structure, and a cell delineation controller for detecting delineation states of the data blocks read out from the buffer memory, notifying the read controller of delineation control information corresponding to a result of the detection and transmitting data blocks read out in synchronism with a predetermined cell structure to the output line selectively, wherein the read controller determines the read beginning addresses of data blocks to be read out nextly correspondingly to the input lines on the basis of the delineation control information notified by the cell delineati

Abstract: A cell multiplexer includes a multiplexing unit for time-divisionally multiplexing ATM cell signals given from a plurality of input lines, a write controller for storing cell signals outputted from the multiplexing unit in a buffer memory successively correspondingly to the input lines, a read controller for reading the cell signals stored in the buffer memory from the buffer memory in the form of data blocks synchronized with an ATM cell structure, and a cell delineation controller for detecting delineation states of the data blocks read out from the buffer memory, notifying the read controller of delineation control information corresponding to a result of the detection and transmitting data blocks read out in synchronism with a predetermined cell structure to the output line selectively, wherein the read controller determines the read beginning addresses of data blocks to be read out nextly correspondingly to the input lines on the basis of the delineation control information notified by the cell delineati