Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection and a second metal interconnection in the first IMD layer; forming a channel layer on the first metal interconnection and the second metal interconnection; forming a magnetic tunneling junction (MTJ) stack on the channel layer; and removing the MTJ stack to form a MTJ.

Abstract: A composite film includes a first thermoplastic elastomer film layer and a second thermoplastic elastomer film layer, wherein the first thermoplastic elastomer film layer includes a first styrenic block copolymer. The second thermoplastic elastomer film layer is disposed on the first thermoplastic elastomer film layer, wherein the second thermoplastic elastomer film layer includes a second styrenic block copolymer, diffusion particles dispersed in the second thermoplastic elastomer film layer, and a surface microstructure disposed on the surface of the second thermoplastic elastomer film layer.

Abstract: A circuit to cancel the effect of parasitic capacitances (“initial signals”) in calculations as to precise touch locations on a touch display screen (signal compensation circuit) includes first and second compensation circuits connected to a charge-discharge node. The first compensation circuit receives initial signals, generates first charging currents to charge, and first discharging currents to discharge, the charging-discharging node. The second compensation circuit generates second charging currents to charge, and second discharging currents to discharge, the charging-discharging node. Values of the first charging currents, the second charging currents, the first discharging currents, and the second discharging currents are of different magnitudes and are applied in order to amount to a more precise match for the exact compensation value required.

Abstract: A backsheet of a solar cell module including a substrate, a first protection layer, and a second protection layer is provided. The substrate includes a first surface and a second surface opposite to each other. The first protection layer is disposed on the first surface of the substrate. The second protection layer is disposed on the second surface of the substrate, wherein the first protection layer and the second protection layer include a silicone layer. At least one of the first protection layer and the second protection layer includes diffusion particles, wherein the diffusion particles include zinc oxide, titanium dioxide modified with silicon dioxide, or a combination thereof. A thickness of the first protection layer and a thickness of the second protection layer are respectively 10 ?m to 30 ?m. A solar cell module including the backsheet is also provided.

Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.

Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.

Abstract: Systems, apparatuses, and methods related to a controller architecture for read data alignment are described. An example method can include sending a first notification from a physical layer to each of a number of memory controllers, wherein the first notification indicates that the physical layer and/or a memory device coupled to the physical layer is busy, and blocking commands on each of the number of memory controllers in response to receiving the first notification to cause read data alignment. The method can also include sending a second notification from the physical layer to each of the number of memory controllers, wherein the second notification indicates that the physical layer and/or the memory device coupled to the physical layer is no longer busy, and resuming processing commands on each of the number of memory controllers in response to receiving the second notification.

Abstract: A modulation device including a plurality of electronic elements, at least one first signal line and a first driving circuit is provided. The at least one first signal line is respectively electrically connected to at least one of the electronic elements. The first driving circuit is electrically connected to the at least one first signal line. The first driving circuit provides a first signal to at least one of the at least one first signal line. The first signal includes a first pulse. The first pulse includes a first section and a second section closely adjacent to the first section.

Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection and a second metal interconnection in the first IMD layer; forming a channel layer on the first metal interconnection and the second metal interconnection; forming a magnetic tunneling junction (MTJ) stack on the channel layer; and removing the MTJ stack to form a MTJ.

Abstract: A manufacturing method of a multi-screen display is provided. The manufacturing method includes the following steps. A first panel is provided. A second panel is provided. The first panel and the second panel are spliced. The first color coordinate of the first panel includes a first horizontal coordinate and a first vertical coordinate, and the second color coordinate of the second panel includes a second horizontal coordinate and a second vertical coordinate. The difference between the horizontal coordinate and the second horizontal coordinate is ?x, the difference between the first vertical coordinate and the second vertical coordinate is ?y, and ?x and ?y satisfy the following relationship: ?=arctan(?x/?y), 46 degrees???126 degrees.

Abstract: Provided is a composition including a lactic acid bacterium and a carrier thereof for prophylaxis or treatment of an allergy. The lactic acid bacterium is Lactobacillus paragasseri, such as Lactobacillus paragasseri BBM171 deposited under DSMZ Accession No. DSM 34311. Also provided is a method for preventing or treating an allergy in a subject that includes administering an effective amount of the composition of Lactobacillus paragasseri to the subject.

Abstract: A hydrocarbon resin polymer is provided. The hydrocarbon resin polymer includes: 0.15-15 mol % of repeating units (A), which are derived from bridged ring monomer compounds; 15-90 mol % of repeating units (B), which are derived from monovinyl aromatic compounds; and 8-80 mol % of repeating units (C), which are derived from divinyl aromatic compounds.

Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, and a heat sink lid. The die is disposed on the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies.

Abstract: In general, techniques are described regarding fusing or combining frames of image data to generate composite frames of image data. Cameras comprising camera processors configured to perform the techniques are also disclosed. A camera processor may capture multiple frames at various focal lengths. The frames of image data may have various regions of the respective frame in focus, whereas other regions of the respective frame may not be in focus, due to particular configurations of lens and sensor combinations used. The camera processor may combine the frames to achieve a single composite frame having both a first region (e.g., a center region) and a second region (e.g., an outer region) in focus.

Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, a heat sink lid and conductive balls. The die is disposed on a front surface of the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the front surface of the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies. The conductive balls are disposed on the opposite surface of the circuit substrate and electrically connected with the die through the circuit substrate.

Abstract: A probe module includes a circuit board and at least one probe formed on a probe installation surface of the circuit board by a microelectromechanical manufacturing process and including a probe body and a probe tip. The probe body includes first and second end portions and a longitudinal portion having first and second surfaces facing toward opposite first and second directions. The probe tip extends from the probe body toward the first direction and is processed with a gradually narrowing shape by laser cutting. The first and/or second end portion has a supporting seat protruding from the second surface toward the second direction and connected to the probe installation surface, such that the longitudinal portion and the probe tip are suspended above the probe installation surface. The probe has a tiny pinpoint for detecting tiny electronic components, and its manufacturing method is time-saving and high in yield rate.

Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.

Abstract: Techniques and systems are provided for processing image data. A first image having a first resolution can be obtained. In some aspects, the first image is generated based on a pixel binning process. A second image can be obtained having a second resolution that is greater than the first resolution. In some aspects, the second image is generated based on a remosaicing process. One or more weight maps can be generated based on characteristics determined based on pixels of the first image, pixels of the second image, or pixels of both the first image and the second image. A fused image can be generated based on the one or more weight maps that includes a first set of pixels from the first image and a second set of pixels from the second image.

Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, a heat sink lid and conductive balls. The die is disposed on a front surface of the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the front surface of the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies. The conductive balls are disposed on the opposite surface of the circuit substrate and electrically connected with the die through the circuit substrate.

Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.