Patents by Inventor Yu Chen Lin

Yu Chen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154314
    Abstract: An antenna device includes a substrate, two T-shaped radiation portions, two feeding portions and an isolation structure. The substrate has an upper surface, a side surface and a lower surface. Two opposite ends of the side surface are connected to the upper surface and the lower surface, respectively. The two T-shaped radiation portions are located on the upper surface of the substrate. The two feeding portions are connected to the two T-shaped radiation portions, respectively, and the two feeding portions are located on the side surface of the substrate. The isolation structure is located on the upper surface of the substrate, and the isolation structure is disposed between the two T-shaped radiation portions.
    Type: Application
    Filed: March 1, 2023
    Publication date: May 9, 2024
    Inventors: Hsin-Hung Lin, Yu Shu Tai, WEI-CHEN CHENG
  • Publication number: 20240152735
    Abstract: Provided is a system for detecting an anomaly in a multivariate time series that includes at least one processor programmed or configured to receive a dataset of a plurality of data instances, wherein each data instance comprises a time series of data points, determine a set of target data instances based on the dataset, determine a set of historical data instances based on the dataset, generate, based on the set of target data instances, a true value matrix, a true frequency matrix, and a true correlation matrix, generate a forecast value matrix, a forecast frequency matrix, and a forecast correlation matrix based on the set of target data instances and the set of historical data instances, determine an amount of forecasting error, and determine whether the amount of forecasting error corresponds to an anomalous event associated with the dataset of data instances. Methods and computer program products are also provided.
    Type: Application
    Filed: June 10, 2022
    Publication date: May 9, 2024
    Applicant: Visa International Service Association
    Inventors: Lan Wang, Yu-San Lin, Yuhang Wu, Huiyuan Chen, Fei Wang, Hao Yang
  • Publication number: 20240153901
    Abstract: A first and second semiconductor device are bonded together using a bonding contact pad embedded within a bonding dielectric layer of the first semiconductor device and at least one bonding via embedded within a bonding dielectric layer of the second semiconductor device. The bonding contact pad extends a first dimension in a first direction perpendicular to the major surface of the first semiconductor device and a second dimension in a second direction parallel to the plane of the first semiconductor wafer, the second dimension being at least twice the first dimension. The bonding via extends a third dimension in the first direction and a fourth dimension in the second direction, the third dimension being at least twice the first dimension. The bonding contact pad and bonding via may be at least partially embedded in respective bonding dielectric layers in respective topmost dielectric layers of respective stacked interconnect layers.
    Type: Application
    Filed: January 9, 2023
    Publication date: May 9, 2024
    Inventors: Yu-Hung Lin, Han-Jong Chia, Wei-Ming Wang, Kuo-Chung Yee, Chen Chen, Shih-Peng Tai
  • Patent number: 11977274
    Abstract: An optical photographing lens assembly includes seven lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. Each of the seven lens elements of the optical photographing lens assembly has an object-side surface facing toward the object side and an image-side surface facing toward the image side. The object-side surface of the first lens element is concave in a paraxial region thereof. The object-side surface of the first lens element is aspheric and has at least one critical point in an off-axis region thereof.
    Type: Grant
    Filed: November 2, 2022
    Date of Patent: May 7, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Cheng-Chen Lin, Yu-Tai Tseng, Tzu-Chieh Kuo
  • Patent number: 11974302
    Abstract: A method and a User Equipment (UE) for beam operations are provided. The method includes monitoring at least one of a plurality of Control Resource Sets (CORESETs) configured for the UE within an active Bandwidth Part (BWP) of a serving cell in a time slot; and applying a first Quasi Co-Location (QCL) assumption of a first CORESET of a set of one or more of the monitored at least one of the plurality of CORESETs to receive a Downlink (DL) Reference Signal (RS), wherein the first CORESET is associated with a monitored search space configured with a lowest CORESET Identity (ID) among the set of one or more of the monitored at least one of the plurality of CORESETs.
    Type: Grant
    Filed: April 6, 2023
    Date of Patent: April 30, 2024
    Assignee: Hannibal IP LLC
    Inventors: Chien-Chun Cheng, Tsung-Hua Tsai, Yu-Hsin Cheng, Wan-Chen Lin
  • Patent number: 11974311
    Abstract: A method for wireless communication performed by a user equipment (UE) is provided. The method includes receiving, from a base station (BS), a Radio Resource Control (RRC) configuration to configure a first semi-persistent scheduling (SPS) physical downlink shared channel (PDSCH) and generating first uplink control information (UCI) in response to the first SPS PDSCH, where the RRC configuration includes a first parameter that indicates a priority of the first UCI.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: April 30, 2024
    Assignee: Hannibal IP LLC
    Inventors: Wan-Chen Lin, Yu-Hsin Cheng, Heng-Li Chin, Hsin-Hsi Tsai
  • Publication number: 20240138138
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 25, 2024
    Inventors: SHIH-FAN KUAN, WEI-CHEN PAN, YU-TING LIN, HUEI-RU LIN
  • Publication number: 20240136246
    Abstract: A semiconductor device includes a package structure, a first heat spreader, and a second heat spreader. The first heat spreader is aside the package structure. The second heat spreader is in physical contact with the first heat spreader. The second heat spreader covers a top surface and sidewalls of the package structure. A material of the first heat spreader is different from a material of the second heat spreader.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Yu-Sheng Lin, Po-Chen Lai, Shin-Puu Jeng
  • Publication number: 20240138139
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.
    Type: Application
    Filed: July 17, 2023
    Publication date: April 25, 2024
    Inventors: SHIH-FAN KUAN, WEI-CHEN PAN, YU-TING LIN, HUEI-RU LIN
  • Patent number: 11966832
    Abstract: A method includes receiving a first data set comprising embeddings of first and second types, generating a fixed adjacency matrix from the first dataset, and applying a first stochastic binary mask to the fixed adjacency matrix to obtain a first subgraph of the fixed adjacency matrix. The method also includes processing the first subgraph through a first layer of a graph convolutional network (GCN) to obtain a first embedding matrix, and applying a second stochastic binary mask to the fixed adjacency matrix to obtain a second subgraph of the fixed adjacency matrix. The method includes processing the first embedding matrix and the second subgraph through a second layer of the GCN to obtain a second embedding matrix, and then determining a plurality of gradients of a loss function, and modifying the first stochastic binary mask and the second stochastic binary mask using at least one of the plurality of gradients.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: April 23, 2024
    Assignee: Visa International Service Association
    Inventors: Huiyuan Chen, Yu-San Lin, Lan Wang, Michael Yeh, Fei Wang, Hao Yang
  • Publication number: 20240130066
    Abstract: A tray and an electronic device using the same are provided. The tray used to carry an expansion card includes a base, a tray body, a sliding plate, and a limiting spring. The tray body is slidably disposed on the base and has a base portion and two side walls disposed on two sides of the base portion. The sliding plate is slidably disposed on the base portion and is able to be moved away from or close to one of the side walls relative to the tray body selectively. The limiting spring is disposed on the base portion and is used to limit the sliding plate.
    Type: Application
    Filed: December 16, 2022
    Publication date: April 18, 2024
    Applicant: Wistron Corporation
    Inventors: Yu-Chen Lin, Li-Shu Chen, Ching-Hao Chen
  • Publication number: 20240117314
    Abstract: The present invention relates to a method for preparing a modified stem cell, including the following steps: a cell culture step: culturing stem cells in a first culture medium of a culture dish at a predetermined cell density, and removing the first culture medium after a first culture time to obtain a first cell intermediate; an activity stimulation step: preserving the first cell intermediate in a freezing container having a cell cryopreservation solution, and performing a constant temperature stimulation treatment or a variable temperature stimulation treatment for at least more than 1 day; and a product collection step: after completing the activity stimulation step, placing the freezing container in an environment at a thawing temperature for thawing, and then removing the cell cryopreservation solution to obtain the modified stem cell. The modified stem cell can release at least one or more of IL-4, IL-5, IL-13, G-CSF, Fractalkine, and EGF.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Inventors: Ruei-Yue Liang, Chia-Hsin Lee, Kai-Ling Zhang, Po-Cheng Lin, Ming-Hsi Chuang, Yu-Chen Tsai, Peggy Leh Jiunn Wong
  • Publication number: 20240117316
    Abstract: The present disclosure provides a method for preparing mesenchymal stem cell-derived extracellular vesicle, the mesenchymal stem cell-derived extracellular vesicle prepared by the method, and use of the mesenchymal stem cell-derived extracellular vesicle for reducing adipogenesis and treating osteoarthritis. The mesenchymal stem cell-derived extracellular vesicle of the present disclosure achieves the effect of reducing adipogenesis and treating osteoarthritis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Chen Tsai, Ming-Hsi Chuang, Po-Cheng Lin
  • Publication number: 20240121718
    Abstract: Some of the present implementations provide a method for a user equipment (UE) for receiving a power saving signal. The method receives, from a base station, a power saving signal comprising a minimum applicable K0 (K0min) that indicates a minimum scheduling offset restriction between a physical downlink control channel (PDCCH) and a physical downlink shared channel (PDSCH). The method determines an application delay based on a predefined value. The method then applies the minimum scheduling offset restriction after the application delay.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Hsin Cheng, Chie-Ming Chou, Wan-Chen Lin, Tsung-Hua Tsai
  • Publication number: 20240113695
    Abstract: A modulation device including a plurality of electronic elements, at least one first signal line and a first driving circuit is provided. The at least one first signal line is respectively electrically connected to at least one of the electronic elements. The first driving circuit is electrically connected to the at least one first signal line. The first driving circuit provides a first signal to at least one of the at least one first signal line. The first signal includes a first pulse. The first pulse includes a first section and a second section closely adjacent to the first section.
    Type: Application
    Filed: August 30, 2023
    Publication date: April 4, 2024
    Applicant: Innolux Corporation
    Inventors: Yi-Hung Lin, Kung-Chen Kuo, Yu-Chia Huang, Nai-Fang Hsu
  • Patent number: 11950428
    Abstract: A memory device includes a first stacking structure, a second stacking structure, a plurality of first isolation structures, gate dielectric layers, channel layers and conductive pillars. The first stacking structure includes a plurality of first gate layers, and a second stacking structure includes a plurality of second gate layers, where the first stacking structure and the second stacking structure are located on a substrate and separated from each other through a trench. The first isolation structures are located in the trench, where a plurality of cell regions are respectively confined between two adjacent first isolation structures of the first isolation structures in the trench, where the first isolation structures each includes a first main layer and a first liner surrounding the first main layer, where the first liner separates the first main layer from the first stacking structure and the second stacking structure.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Chen Wang, Meng-Han Lin, Sai-Hooi Yeong, Yu-Ming Lin, Han-Jong Chia
  • Patent number: 11943936
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first transistor, a first resistive random access memory (RRAM) resistor, and a second RRAM resistor. The first resistor includes a first resistive material layer, a first electrode shared by the second resistor, and a second electrode. The second resistor includes the first electrode, a second resistive material layer, and a third electrode. The first electrode is electrically coupled to the first transistor.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Der Chih, May-Be Chen, Yun-Sheng Chen, Jonathan Tsung-Yung Chang, Wen Zhang Lin, Chrong Jung Lin, Ya-Chin King, Chieh Lee, Wang-Yi Lee
  • Patent number: 11943785
    Abstract: A method for PDCCH monitoring performed by a UE is provided. The method includes performing the PDCCH monitoring in a first group associated with at least one first PDCCH monitoring configuration; receiving, from a base station, DCI comprising an indicator; performing the PDCCH monitoring in a second group associated with at least one second PDCCH monitoring configuration; and stopping the PDCCH monitoring in the first group after receiving the indicator.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: March 26, 2024
    Assignee: FG Innovation Company Limited
    Inventors: Wan-Chen Lin, Chie-Ming Chou, Tsung-Hua Tsai, Yu-Hsin Cheng
  • Publication number: 20240097351
    Abstract: The present disclosure provides an antenna system, which includes a defected ground structure board and an antenna structure board. The defected ground structure board includes a first insulating plate and a defected ground structure layer, and the defected ground structure layer is disposed on the first insulating plate. The antenna structure board is disposed on the defected ground structure board. The antenna structure board includes at least one antenna body and a second insulating plate, the at least one antenna body is disposed on the second insulating plate, and the second insulating plate is disposed on the defected ground structure layer.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 21, 2024
    Inventors: Hsin Hung LIN, Yu Shu TAI, Wei Chen CHENG
  • Publication number: 20240097067
    Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 21, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Bo-Wei Wu, Yu-Yun Lo, Chien-Chen Kuo, Chang-Feng Tsai, Tzu-Yang Lin