Patents by Inventor Yu-Cheng Chen

Yu-Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942750
    Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
  • Publication number: 20240096712
    Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Jiang, Chieh-Fang Chen, Yen-Chung Ho, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11934239
    Abstract: In an embodiment, a circuit includes: an error amplifier; a temperature sensor, wherein the temperature sensor is coupled to the error amplifier; a discrete time controller coupled to the error amplifier, wherein the discrete time controller comprises digital circuitry; a multiple bits quantizer coupled to the discrete time controller, wherein the multiple bits quantizer produces a digital code output; and a heating array coupled to the multiple bits quantizer, wherein the heating array is configured to generate heat based on the digital code output.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Cheng Huang, Yi-Hsing Hsiao, Yu-Jie Huang, Tsung-Tsun Chen, Allen Timothy Chang
  • Publication number: 20240088026
    Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 14, 2024
    Inventors: Yi Ching Ong, Wei-Cheng Wu, Chien Hung Liu, Harry-Haklay Chuang, Yu-Sheng Chen, Yu-Jen Wang, Kuo-Ching Huang
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240086109
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a write command from a host system, and the write command including first data; checking a status of a first physical programming unit in a first physical erasing unit; in response to the status of the first physical programming unit being a first status, sending a first command sequence to a rewritable non-volatile memory module, and the first command sequence being configured to instruct the rewritable non-volatile memory module to store at least part of the first data to the first physical programming unit.
    Type: Application
    Filed: October 17, 2022
    Publication date: March 14, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Jia-Li Xu, Ping-Cheng Chen
  • Publication number: 20240084069
    Abstract: A resin matrix composition is provided in the present invention. The resin matrix composition includes an epoxy resin, a polysulfone engineering plastic, a modified polyetherimide and an amine curing agent. The modified polyetherimide is formed from a nucleophilic compound and polyetherimide. The nucleophilic compound has a nucleophile such as hydroxyl group, sulfhydryl group, carboxyl group and/or amine group. Therefore, a resin matrix with two phase separation of island phase and co-continuous phase is formed. The resin matrix can have both great flexural strength and toughness. Moreover, the resin matrix has suitable viscosity, such that it is appropriate for impregnating carbon fiber to produce prepreg and carbon fiber composites.
    Type: Application
    Filed: August 21, 2023
    Publication date: March 14, 2024
    Inventors: Yu-Cheng HSU, Tang-Chun KAO, Hsuan-Yin CHEN, Long-Tyan HWANG
  • Patent number: 11930631
    Abstract: The present disclosure relates to a semiconductor memory device and a fabricating method thereof, and the semiconductor memory device includes a substrate, bit lines, plugs and a spacer structure. The bit lines are separately disposed on the substrate, and the plugs are also disposed on the substrate to alternately arrange with the bit lines. The spacer structure is disposed on the substrate, between each of the bit lines and each of the plugs. The spacer structure includes a first air gap layer, a first spacer and a second air gap layer, and the first air gap layer, the first spacer and the second air gap layer are sequentially stacked between sidewalls of the bit lines and the plugs. Therefore, two air gap layers may be formed between the bit lines and the storage node contacts to improve the delay between the resistor and the capacitor.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: March 12, 2024
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Ken-Li Chen, Yifei Yan, Yu-Cheng Tung
  • Publication number: 20240078445
    Abstract: The application relates to a method for developing the agitation system of a scale-up polymerization vessel. A simulated prediction model is obtained by use of a small polymerization vessel and by integrating Taguchi experimental design method with artificial intelligence (AI) neural network. Accordingly, vessel parameters for the agitation system of a scale-up polymerization vessel can be rapidly and accurately predicted based on simulation qualities thereof, further facilitating a construction of the agitation system of a scale-up polymerization vessel.
    Type: Application
    Filed: July 6, 2023
    Publication date: March 7, 2024
    Inventors: Fuh-Yih SHIH, Shih-Ming YEH, Yu-Cheng CHEN, Jun-Teng CHEN
  • Patent number: 11895883
    Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: February 6, 2024
    Assignee: Apple Inc.
    Inventors: Cheng-Ho Yu, Chin-Wei Lin, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis, Shih-Chang Chang, Yu Cheng Chen, John Z. Zhong
  • Patent number: 11882752
    Abstract: An electronic device display may have an active area with pixels. An optical sensor may be formed under a sensor region in the active area. During operation, ambient light and/or other light associated with the optical sensor may pass through the sensor region. To ensure that the light for the optical sensor can pass through the display, the display may have one or more layers with sensor openings such as a metal layer and a pressure sensitive adhesive layer that attaches the metal layer to the pixels of the display. To help minimize visibility of the openings in the sensor region, the pressure sensitive adhesive layer may be configured to have a reflectivity that matches the appearance of the display in the sensor region to surrounding areas. Undesired light output uniformity can be reduced by ensuring that the substrate material in the display has a low light absorption coefficient.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 23, 2024
    Assignee: Apple Inc.
    Inventors: Zhao Wang, Alexis G. Soyseven, David S. Hum, Graeme M. Williams, Ing-Jye Wang, Jae Won Choi, Jimmy H. Huang, Ming Xu, Sungki Lee, Timothy H. Ellis, Yu Cheng Chen, Yuchi Che
  • Patent number: 11876099
    Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: January 16, 2024
    Assignee: Apple Inc.
    Inventors: Hiroshi Osawa, Kyung-Wook Kim, Ming-Chin Hung, Shih Chang Chang, Yu-Cheng Chen
  • Patent number: 11839024
    Abstract: Disclosed are composites comprising copper foils having at least one smooth surface and an adhesive layer with low Dk and Df properties. Also disclosed are copper clad laminates made by laminating the present composites with flexible or rigid substrates that exhibit heat resistance and good to excellent bonding strength. The PCBs made therefrom exhibit low insertion loss and may be assembled with other components to form various electrical devices utilizing high speed of at least 1 Gps or high frequency signals of at least 1 GHz.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: December 5, 2023
    Assignee: DUPONT ELECTRONICS, INC.
    Inventors: Yu-Cheng Chen, Mu-Huan Chi, Shih-Ching Lin, Wei-Guang Liu
  • Publication number: 20230292149
    Abstract: A UE performs up to a threshold number of attempts to transmit a default capability message to a base station, the default capability message representing a default set of CA combinations supported by the UE. If transmission is unsuccessful, the UE switches to a compact capability mode in which the UE attempts to transmit compacted UE capability messages representing successively smaller subsets of the default set of CA combinations until either a capability message is successfully received by the base station or a second threshold number of unsuccessful transmission attempts is performed. To facilitate configuration of an initial compacted capability message, the UE maintains a PC list that lists one or more cells that have been identified previously as incapable of receiving default-sized capability messages and that further identifies a representation of a limited subset of CA combinations to include in capability messages sent to a corresponding listed cell.
    Type: Application
    Filed: August 6, 2020
    Publication date: September 14, 2023
    Inventors: Meng-Hau Wu, Xu Ou, Yu-Cheng Chen, Rukun Mao, Zong Syun Lin, Qin Zhang, Yi-Hua Li
  • Patent number: 11722590
    Abstract: An electronic device display may have an active area with pixels. An optical sensor may be formed under a sensor region in the active area. During operation, ambient light and/or other light associated with the optical sensor may pass through the sensor region. To ensure that the light for the optical sensor can pass through the display, the display may have one or more layers with sensor openings such as a metal layer and a pressure sensitive adhesive layer that attaches the metal layer to the pixels of the display. To help minimize visibility of the openings in the sensor region, the pressure sensitive adhesive layer may be configured to have a reflectivity that matches the appearance of the display in the sensor region to surrounding areas. Undesired light output uniformity can be reduced by ensuring that the substrate material in the display has a low light absorption coefficient.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: August 8, 2023
    Assignee: Apple Inc.
    Inventors: Ming Xu, Yu Zhang, Yu Cheng Chen, David S. Hum, Yi Qiao
  • Publication number: 20230192501
    Abstract: The present invention relates to silicon-based powders and a method for producing the silicon-based powders. The method for producing the silicon-based powders includes a hydrolysis step of a silicon precursor having an alkoxy group, a condensation step and a drying step. By a specific weight ratio of water to the silicon precursor having the alkoxy group and a silicon precursor having a secondary amino group and an alkyl group, in the method for producing the silicon-based powders, the condensation step can be performed without organic solvents, and a modification on silicon-based gels can be performed to enhance a safety of processes and a hydrophobicity of the resulted silicon-based powders, and decrease a thermal conductivity and a bulk density of the resulted silicon-based powders.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 22, 2023
    Inventors: Wen-Bee KUO, Ming-Hung CHENG, Wan-Tun HUNG, Yu-Cheng CHEN, Wen-Hung TSENG, Kuo-Ming HUANG, Wen-Chieh LAI, Shang-Shih LI, Wen-Yuan CHEN, Hsin TSENG, Hsun-Ku LEE, Yu-Hsin CHEN
  • Publication number: 20230192541
    Abstract: The present invention relates to a fiber composite material and a method for producing the fiber composite material. The method for producing the fiber composite material includes a hydrolysis step of a silicon precursor having an alkoxy group, an in-situ condensation step and a drying step. A specific silicon precursor having a secondary amino group and alkyl groups is used therein, as well as a specific weight ratio of the silicon precursor to a fiber material, the in-situ condensation step can be performed in the absence of organic solvents in the method for producing the fiber composite material, and a hydrophobic modification on silicon-based gels can be performed, thereby simplifying the process, decreasing a thermal conductivity of the resulted fiber composite material and preventing drop dust of the resulted fiber composite material.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 22, 2023
    Inventors: Wen-Bee KUO, Ming-Hung CHENG, Wan-Tun HUNG, Yu-Cheng CHEN, Wen-Hung TSENG, Kuo-Ming HUANG, Wen-Chieh LAI, Shang-Shih LI, Wen-Yuan CHEN, Hsin TSENG, Hsun-Ku LEE, Yu-Hsin CHEN
  • Publication number: 20230154931
    Abstract: An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.
    Type: Application
    Filed: January 18, 2023
    Publication date: May 18, 2023
    Inventors: Hiroshi Osawa, Kyung-Wook Kim, Ming-Chin Hung, Shih Chang Chang, Yu-Cheng Chen
  • Publication number: 20230141628
    Abstract: A large area deposition type additive manufacturing equipment is disclosed. The large area deposition type additive manufacturing equipment includes a light source module, a dynamic photomask module, a raw material tank and a deposition module. The light source module includes a plurality of light emitting members, a light diffusion member, a light enhancement member and a light emitting angle limiter. Light emitted from the light emitting members passes through the light diffusion member, the light enhancement member and the light emitting angle limiter to become a collimated curing light. The collimated curing light travels through a transparent member of the raw material tank and a dynamic photomask module to reach liquid photocurable material in the raw material tank, thereby curing the liquid photocurable material. The angle of emitted light ranges within ±30° with respect to a normal line of an incident plane of the light source module.
    Type: Application
    Filed: May 29, 2022
    Publication date: May 11, 2023
    Inventors: Jeng-Ywan Jeng, Ding-Zheng Lin, Ping-Hung Yu, Yu-Cheng Chen
  • Publication number: 20230131457
    Abstract: A method for fast simulation of possible embossments or pressings of a server casing in manufacture includes obtaining a first design table of design layout scheme; converting machine language for each group of layout schemes in the first design table to import the first design table into a simulation software. Each group of the embossment design layout schemes is simulated to obtain chassis strength or of part of chassis, and each group of the embossment design layout scheme and corresponding chassis strength is stored to the database and identical stored schemes are filtered out. The disclosure also provides an electronic device and a non-transitory storage medium.
    Type: Application
    Filed: December 13, 2021
    Publication date: April 27, 2023
    Inventors: KUANG-HUI MA, YU-CHENG CHEN