Patents by Inventor Yu-Chieh Huang

Yu-Chieh Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7985662
    Abstract: A method of manufacturing dies formed with a dielectric layer is revealed. A liquid dielectric layer is formed on the dicing tape. The liquid dielectric layer is heated to be sticky. Then, a wafer is attached to the dielectric layer on the dicing tape. The wafer is diced into a plurality of dies on the dicing tape. The dies with attached portions of the dielectric layer are picked up to be peeled and separated from the dicing tape. The implementation of the dicing tape can be expanded to resolve various issues such as wafer contaminations, wafer warpage due to multiple heating and mismatching of thermal expansion coefficients, and wafer singulation problems due to alignment difficulties. The wafer handling steps can further be reduced to increase processing yield and to enhance easy and better processing.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: July 26, 2011
    Assignee: Powertech Technology Inc.
    Inventor: Yu-Chieh Huang
  • Publication number: 20100261337
    Abstract: A method of manufacturing dies formed with a dielectric layer is revealed. A liquid dielectric layer is formed on the dicing tape. The liquid dielectric layer is heated to be sticky. Then, a wafer is attached to the dielectric layer on the dicing tape. The wafer is diced into a plurality of dies on the dicing tape. The dies with attached portions of the dielectric layer are picked up to be peeled and separated from the dicing tape. The implementation of the dicing tape can be expanded to resolve various issues such as wafer contaminations, wafer warpage due to multiple heating and mismatching of thermal expansion coefficients, and wafer singulating problems due to alignment difficulties. The wafer handling steps can further be reduced to increase processing yield and to enhance easy and better processing.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 14, 2010
    Inventor: Yu-Chieh HUANG
  • Publication number: 20100244053
    Abstract: A light emitting device, includes a substrate; a first semiconductor layer on the substrate; an active layer on the first semiconductor layer; a second semiconductor layer on the active layer; a transparent conductive layer on the second semiconductor layer; and a plurality of pillar structures with a hollow structure in the portion surface of the first semiconductor layer, thereby, the light extraction efficiency of the light emitting device can be improved due to the pillar structures with a hollow structure.
    Type: Application
    Filed: April 17, 2009
    Publication date: September 30, 2010
    Inventors: Jing-Jie DAI, Wen-Chung Shih, Bo-Yuan Huang, Su-Hui Lin, Yu-Chieh Huang
  • Publication number: 20080032434
    Abstract: One embodiment of the invention relates to a method of manufacturing a light emitting diode. The method includes forming an insulating layer on an area, not covered by a seed layer, of at least one of a p-type semiconductor layer and an n-type semiconductor layer, wherein the impurity concentration varies on the surface of the area; and immersing at least part of the seed layer into an electrolyte having metal ions which tend to reduce and deposit on the seed layer under no bias voltage.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 7, 2008
    Applicant: EPISTAR CORPORATION
    Inventors: Chia-Ming Chuang, Yu-Heng Shao, Liang-Sheng Chi, Yu-Chieh Huang, Tai-Chan Huo