Patents by Inventor Yu-Chung Su

Yu-Chung Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240077802
    Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate. The protective layer and the photoresist layer are selectively exposed to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer. The protective layer includes a polymer without a nitrogen-containing moiety, and a basic quencher, an organic acid, a photoacid generator, or a thermal acid generator.
    Type: Application
    Filed: August 7, 2023
    Publication date: March 7, 2024
    Inventors: Yu-Chung SU, Tsung-Han KO, Ching-Yu CHANG
  • Publication number: 20230377883
    Abstract: A system and method utilize directed self-assembly films, including block copolymers and solvents, to form features on a wafer. The solvents have high boiling points. The high boiling points of the solvents enable directed self-assembly processes to utilize very high temperature, rapid thermal annealing processes to generate a pattern of first and second polymer structures over a wafer from the directed self-assembly films. The pattern of the first and second polymer structures can be utilized to form the features on the wafer.
    Type: Application
    Filed: May 20, 2022
    Publication date: November 23, 2023
    Inventors: Yu-Ling CHANG CHIEN, Yu-Chung SU, Yahru CHENG, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20230350302
    Abstract: A method for forming a semiconductor structure is provided. The method includes forming a photoresist layer over a substrate. The photoresist layer includes a polymer, a photoacid initiator and a crosslinker containing at least two crosslinking sites. The photoresist layer is then cured to crosslink the polymer, thereby forming a crosslinked polymer. Next, the photoresist layer is exposed to a radiation. An acid produced from exposure of the photoacid generator de-crosslinks the crosslinked polymer in exposed portions of the photoresist layer. The exposed portions of the photoresist layer are subsequently removed to form a patterned photoresist layer.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 2, 2023
    Inventors: Yu-Chung SU, Lilin CHANG, Jia-Lin WEI, Ching-Yu CHANG
  • Publication number: 20230238275
    Abstract: A method of forming a semiconductor device includes forming a plurality of non-insulator structures on a substrate, the plurality of non-insulator structures being spaced apart by trenches, forming a sacrificial layer overfilling the trenches, reflowing the sacrificial layer at an elevated temperature, wherein a top surface of the sacrificial layer after the reflowing is lower than a top surface of the sacrificial layer before the reflowing, etching back the sacrificial layer to lower the top surface of the sacrificial layer to fall below top surfaces of the plurality of non-insulator structures, forming a dielectric layer on the sacrificial layer, and removing the sacrificial layer to form air gaps below the dielectric layer.
    Type: Application
    Filed: April 14, 2022
    Publication date: July 27, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chih HO, Yu-Chung SU, Ching-Yu CHANG, Chin-Hsiang LIN
  • Publication number: 20230161240
    Abstract: In a method of manufacturing a reflective mask, an adhesion layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an absorber layer disposed over the capping layer, and a hard mask layer disposed over the absorber layer. A photoresist pattern is formed over the adhesion layer, the adhesion layer is patterned, the hard mask layer is patterned, and the absorber layer is patterned using the patterned hard mask layer as an etching mask. The photoresist layer has a higher adhesiveness to the adhesion layer than to the hard mask layer.
    Type: Application
    Filed: May 4, 2022
    Publication date: May 25, 2023
    Inventors: Wei-Che HSIEH, Chia-Ching CHU, Ya-Lun CHEN, Yu-Chung SU, Tzu-Yi WANG, Yahru CHENG, Ta-Cheng LIEN, Hsin-Chang LEE, Ching-Yu CHANG
  • Publication number: 20230087992
    Abstract: Photosensitive polymers and their use in photoresists for photolithographic processes are disclosed. The polymers are copolymers, with at least one monomer that includes pendant polycyclic aromatic groups and a second monomer that includes an acidic leaving group (ALG). The polymers have high resistance to etching and high development contrast.
    Type: Application
    Filed: March 15, 2022
    Publication date: March 23, 2023
    Inventors: Wei-Che Hsieh, Yu-Chung Su, Chia-Ching Chu, Tzu-Yi Wang, Ta-Cheng Lien, Hsin-Chang Lee, Ching-Yu Chang, Yahru Cheng
  • Patent number: 11500179
    Abstract: A high-resolution imaging lens proofed against high-temperature instability includes a first lens with a negative power, a second lens with a negative power, a third lens with a positive power, a fourth lens with a negative power, a fifth lens with a positive power, and a sixth lens with a positive power. The first to the sixth lenses satisfy conditions of F1<0; 0.8>|F2/F6|>0.6, F2<0, F6>0; ?3>F4/F5>?2, and 2.0<F/#. Each of the first lens, the third lens, the fourth lens, and the fifth lens is made of glass, each of the second lens and the sixth lens is made of plastic.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: November 15, 2022
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Chung Su, Chun-Cheng Ko
  • Patent number: 11409084
    Abstract: A lens module includes a first lens having a negative refractive power, a second lens having a positive refractive power, a third lens having a positive refractive power, a fourth lens having a positive refractive power, a fifth lens having a negative refractive power, and an imaging surface, arranged in that sequence from an object side to an image side. The lens module uses infrared light which has a wavelength ranging from 920 to 970 nm, the lens module satisfies the following conditions: 0.0002<|1/F1|<0.01; D/TTL>1.1; CT4/ET4<1.8; F1 denotes a focal length of the first lens, D denotes a diameter of a largest imaging circle of the lens module, TTL denotes a distance between an object side surface of the first lens to the imaging surface, CT4 denotes a central thickness of the fourth lens, ET4 denotes an edge thickness of the fourth lens.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: August 9, 2022
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Yu-Chung Su, Chun-Cheng Ko
  • Patent number: 11120995
    Abstract: A method includes forming a bottom layer of a multi-layer mask over a first gate structure extending across a fin; performing a chemical treatment to treat an upper portion of the bottom layer of the multi-layer mask, while leaving a lower portion of the bottom layer of the multi-layer mask untreated; forming a sacrificial layer over the bottom layer of the multi-layer mask; performing a polish process on the sacrificial layer, in which the treated upper portion of the bottom layer of the multi-layer mask has a slower removal rate in the polish process than that of the untreated lower portion of the bottom layer of the multi-layer mask; forming middle and top layers of the multi-layer mask; patterning the multi-layer mask; and etching an exposed portion of the first gate structure to break the first gate structure into a plurality of second gate structures.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: September 14, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Wei Hsu, Yu-Chung Su, Chen-Hao Wu, Shen-Nan Lee, Tsung-Ling Tsai, Teng-Chun Tsai
  • Patent number: 11094541
    Abstract: In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer resin to more closely match a surface energy of an underlying material in order to help fill gaps between structures. The surface energy of the polymer resin may be modified by either using a surface energy modifying group or else by using an inorganic structure.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: August 17, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Chung Su, Ching-Yu Chang
  • Publication number: 20210200092
    Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate. The protective layer and the photoresist layer are selectively exposed to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer. The protective layer includes a polymer without a nitrogen-containing moiety, and a basic quencher, an organic acid, a photoacid generator, or a thermal acid generator.
    Type: Application
    Filed: November 13, 2020
    Publication date: July 1, 2021
    Inventors: Yu-Chung SU, Tsung-Han KO, Ching-Yu CHANG
  • Publication number: 20200379215
    Abstract: A high-resolution imaging lens proofed against high-temperature instability includes a first lens with a negative power, a second lens with a negative power, a third lens with a positive power, a fourth lens with a negative power, a fifth lens with a positive power, and a sixth lens with a positive power. The first to the sixth lenses satisfy conditions of F1<0; 0.8>|F2/F6|>0.6, F2<0, F6>0; ?3>F4/F5>?2, and 2.0<F/#. Each of the first lens, the third lens, the fourth lens, and the fifth lens is made of glass, each of the second lens and the sixth lens is made of plastic.
    Type: Application
    Filed: May 27, 2020
    Publication date: December 3, 2020
    Inventors: YU-CHUNG SU, CHUN-CHENG KO
  • Publication number: 20200350155
    Abstract: In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer resin to more closely match a surface energy of an underlying material in order to help fill gaps between structures. The surface energy of the polymer resin may be modified by either using a surface energy modifying group or else by using an inorganic structure.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Inventors: Yu-Chung Su, Ching-Yu Chang
  • Patent number: 10770293
    Abstract: In a method of manufacturing a semiconductor device, a photo resist layer is formed over a substrate with underlying structures. The first photo resist layer is exposed to exposure radiation. The exposed first photo resist layer is developed with a developing solution. A planarization layer is formed over the developed photo resist layer. The underlying structures include concave portions, and a part of the concave portions is not filled by the developed first photo resist.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chung Su, Yahru Cheng, Ching-Yu Chang
  • Patent number: 10768527
    Abstract: A method includes providing a photoresist solution that includes a first solvent having a first volume and a second solvent having a second volume, where the first solvent is different from the second solvent and where the first volume is less than the second volume; dispersing the photoresist solution over a substrate to form a film, where the dispersing evaporates a portion of the first solvent and a portion of the second solvent such that a remaining portion of the first solvent is greater than a remaining portion of the second solvent; baking the film; after baking the film, exposing the film to form an exposed film; and developing the exposed film.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Chung Su, Kuan-Hsin Lo, Yahru Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10755927
    Abstract: In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer resin to more closely match a surface energy of an underlying material in order to help fill gaps between structures. The surface energy of the polymer resin may be modified by either using a surface energy modifying group or else by using an inorganic structure.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: August 25, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Chung Su, Ching-Yu Chang
  • Publication number: 20200241261
    Abstract: A lens module includes a first lens having a negative refractive power, a second lens having a positive refractive power, a third lens having a positive refractive power, a fourth lens having a positive refractive power, a fifth lens having a negative refractive power, and an imaging surface, arranged in that sequence from an object side to an image side. The lens module uses infrared light which has a wavelength ranging from 920 to 970 nm, the lens module satisfies the following conditions: 0.0002<|1/F1|<0.01; D/TTL>1.1; CT4/ET4<1.8; F1 denotes a focal length of the first lens, D denotes a diameter of a largest imaging circle of the lens module, TTL denotes a distance between an object side surface of the first lens to the imaging surface, CT4 denotes a central thickness of the fourth lens, ET4 denotes an edge thickness of the fourth lens.
    Type: Application
    Filed: November 25, 2019
    Publication date: July 30, 2020
    Inventors: Yu-Chung SU, Chun-Cheng Ko
  • Publication number: 20200105538
    Abstract: A method includes forming a bottom layer of a multi-layer mask over a first gate structure extending across a fin; performing a chemical treatment to treat an upper portion of the bottom layer of the multi-layer mask, while leaving a lower portion of the bottom layer of the multi-layer mask untreated; forming a sacrificial layer over the bottom layer of the multi-layer mask; performing a polish process on the sacrificial layer, in which the treated upper portion of the bottom layer of the multi-layer mask has a slower removal rate in the polish process than that of the untreated lower portion of the bottom layer of the multi-layer mask; forming middle and top layers of the multi-layer mask; patterning the multi-layer mask; and etching an exposed portion of the first gate structure to break the first gate structure into a plurality of second gate structures.
    Type: Application
    Filed: December 2, 2019
    Publication date: April 2, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Wei HSU, Yu-Chung SU, Chen-Hao WU, Shen-Nan LEE, Tsung-Ling TSAI, Teng-Chun TSAI
  • Publication number: 20200050110
    Abstract: A method includes providing a photoresist solution that includes a first solvent having a first volume and a second solvent having a second volume, where the first solvent is different from the second solvent and where the first volume is less than the second volume; dispersing the photoresist solution over a substrate to form a film, where the dispersing evaporates a portion of the first solvent and a portion of the second solvent such that a remaining portion of the first solvent is greater than a remaining portion of the second solvent; baking the film; after baking the film, exposing the film to form an exposed film; and developing the exposed film.
    Type: Application
    Filed: August 13, 2018
    Publication date: February 13, 2020
    Inventors: Yu-Chung Su, Kuan-Hsin Lo, Yahru Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10515953
    Abstract: Semiconductor devices having void-free dielectric structures and methods of fabricating same are disclosed herein. An exemplary semiconductor device includes a plurality of fin structures disposed over a substrate having isolation features disposed therein and a plurality of gate structures disposed over the plurality of fin structures. The plurality of gate structures traverse the plurality of fin structures. The semiconductor device further includes a dielectric structure defined between the plurality of fin structures and the plurality of gate structures. The dielectric structure has an aspect ratio of about 5 to about 16. The dielectric structure includes a first dielectric layer disposed over the substrate and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer and the second dielectric layer are disposed on sidewalls of the plurality of fin structures and sidewalls of the plurality of gate structures.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: December 24, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ying-Hao Su, Yu-Chung Su, Yu-Lun Liu, Chi-Kang Chang, Chia-Chu Liu, Kuei-Shun Chen