Abstract: The present disclosure relates to an air purifier and, more particularly, to an air purifier capable of introducing a filter support structure including a first body supporting a filter member and having a protruding part on a lower surface thereof, and a second body disposed at a lower portion of the first body and having a groove part having an inclined surface in contact with the protruding part formed at one side thereof, thereby allowing the filter member drawn out of the housing to be inserted into an inner space of the housing and simultaneously moving the filter member upward to form a sealing against a latching part, thereby enhancing convenience of filter management and improving air tightness of the filter member.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a staircase structure disposed over a substrate. The staircase structure includes a plurality of layer stacks, where each layer stack is made of a first material layer over a portion of a second material layer. The staircase structure further includes a plurality of landing pads, where each landing pad is disposed over another portion of the second material layer of a respective layer stack.

Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.

Abstract: A system includes a rack of servers and a fluid circuit for cooling the rack of servers. The fluid circuit includes one or more cooling modules, a heat-exchanging module, and a pump. The one or more cooling modules are thermally connected to a conduit for flowing a coolant therethrough. Each cooling module includes a heat-exchanger thermally connected to the conduit and a chiller fluidly coupled to the heat-exchanger. The heat-exchanging module is fluidly connected to an outlet of the conduit. The pump is configured to drive the coolant from the heat-exchanging module to each server in the rack of servers.

Abstract: In an example, a memory device includes a first stack structure and a second stack structure over the first stack structure. Each of the first stack structure and the second stack structure includes alternately stacked conductor layers and first insulating layers. The memory device also includes a first channel structure extending through the first stack structure, and a second channel structure extending through the second stack structure and connected with the first channel structure. A width of an end of the first channel structure closer to the second channel structure is greater than that of the second channel structure closer to the first channel structure. The memory device further includes a pillar structure extending through the first stack structure and the second stack structure. The pillar structure includes a metal layer.

Abstract: Aspects of the invention include techniques for intimacy-based masking of three dimensional (3D) face landmarks within a metaverse. A non-limiting example method includes determining a degree of intimacy R between a first user and a second user responsive to a first avatar of the first user being observed by a second avatar of the second user in a virtual environment. An initial set of M landmarks of a feature of the first avatar is determined and N landmarks are randomly selected from M for masking. The N landmarks are replaced with random noise sampled with a unit normal distribution to define a set of noised landmarks X that are then iteratively denoised to define a set of denoised landmarks D. A masked version of the first avatar is presented to the second user by modifying the feature of the first avatar with the set of denoised landmarks D.

Abstract: Semiconductor devices and methods of manufacture are discussed. In an embodiment, a method of manufacturing a semiconductor device includes: forming first nanostructures from a first material over a substrate; forming second nanostructures from a second material different from the first material over the substrate, wherein the first nanostructures and the second nanostructures alternate vertically above the substrate; removing the first nanostructures; after the removing the first nanostructures forming an interposer in between the second nanostructures; after the forming the interposer forming a first source/drain region over the substrate and in direct physical contact with the second nanostructures; and removing the interposer exposing surfaces of each of the second nanostructures.

Abstract: A method for determining lower radius limit of movable throat of shale is provided, and it includes: performing a low-temperature nitrogen adsorption test on a target shale to obtain first pore radii; performing a high-pressure mercury injection test on the target shale to obtain second pore radii; performing a nuclear magnetic resonance test on the target shale to obtain third pore radii; obtaining a relationship diagram of distribution frequencies and pore radii according to three pore radii; distinguishing, according to the pore radii, relationship diagram data, and performing normalization processing to determining a relationship curve of normalized frequency data and the pore radii; and determining a lower radius limit of movable throat of shale according to relationship curve. A problem of describing characteristics of shale occurrence space with complex pore structures and strong heterogeneity is solved, the method is suitable for determining lower radius limit of movable throat of shale.

Abstract: A method for determining lower radius limit of movable throat of shale is provided, and it includes: performing a low-temperature nitrogen adsorption test on a target shale to obtain first pore radii; performing a high-pressure mercury injection test on the target shale to obtain second pore radii; performing a nuclear magnetic resonance test on the target shale to obtain third pore radii; obtaining a relationship diagram of distribution frequencies and pore radii according to three pore radii; distinguishing, according to the pore radii, relationship diagram data, and performing normalization processing to determining a relationship curve of normalized frequency data and the pore radii; and determining a lower radius limit of movable throat of shale according to relationship curve. A problem of describing characteristics of shale occurrence space with complex pore structures and strong heterogeneity is solved, the method is suitable for determining lower radius limit of movable throat of shale.

Abstract: A floating point pre-alignment structure for computing-in-memory applications includes a time domain exponent computing block and an input mantissa pre-align block. The time domain exponent computing block is configured to compute a plurality of original input exponents and a plurality of original weight exponents to generate a plurality of flags. Each of the flags is determined by adding one of the original input exponents and one of the original weight exponents. The input mantissa pre-align block is configured to receive a plurality of original input mantissas and shift the original input mantissas according to the flags to generate a plurality of weighted input mantissas, and sparsity of the weighted input mantissas is greater than sparsity of the original input mantissas. Each of the flags has a negative correlation with a sum of the one of the original input exponents and the one of the original weight exponents.

Abstract: A method for calculating state of health of battery, performed by a processing control circuit, includes: charging a battery under test to an upper voltage with a first constant current through a charging circuit and an electrical measuring circuit, discharging the battery under test to a lower voltage with a second constant current through the charging circuit and the electrical measuring circuit, obtaining an accumulated discharge capacity from the upper voltage to the lower voltage through the electrical measuring circuit, and calculating a state of health of the battery under test at least according to the accumulated discharge capacity and a design capacity.

Abstract: A multilayer electronic component includes: a body including a dielectric layer and an internal electrode; and external electrodes disposed on the body. An average content of indium (In) relative to titanium (Ti) satisfies 0.3 at % or more and 3.8 at % or less in a region of the dielectric layer that is spaced apart by 2 nm from an interface thereof with the internal electrode.

Abstract: A battery pack assembly includes a housing having a plurality of sides and defining an internal cavity, a plurality of battery cells received in the internal cavity, and battery electronics received in the internal cavity. A battery pack interface is supported by the housing and connectable to a device. An injection port is supported by the housing. The injection port includes one or more channels positioned on one or more of the sides of the housing. Each channel connects the internal cavity to an exterior of the battery pack. The injection port is configured to direct a fluid comprising adhesive material from the exterior of the battery pack into the internal cavity. The fluid is configured to cover at least one of a portion of the battery cells and a portion of the battery electronics.

Abstract: An all-in-one computer includes a monitor and a host. The monitor includes a display screen, which has an accommodating cavity with an opening located on a peripheral side of the display screen, and the host is detachably mounted in the accommodating cavity from the opening along a first direction. The monitor is provided with a first connecting assembly, the host is provided with a second connecting assembly, and when the host is mounted in the accommodating cavity, the second connecting assembly is connected to the first connecting assembly to implement signal transmission between the host and the monitor. An arrangement direction of the second connecting assembly and the first connecting assembly is perpendicular to the first direction, and the arrangement direction of the second connecting assembly and the first connecting assembly is parallel to a plane on which the display screen is located.

Abstract: The present invention relates to a coral composite extract, a composition including the same and a method of producing the same. The coral composite extract includes at least two briarane-type diterpenoid compounds from corals of Briareum violaceum, B. excavatum and B. stechei, thereby being applied as an effective ingredient of a skin external use composition, a cosmetic composition and a medicinal composition.

Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the disclosed method comprises forming a plurality of dielectric stacks stacked on one another over a substrate to create a multiple-stack staircase structure. Each one of the plurality of dielectric stacks comprises a plurality of dielectric pairs arranged along a direction perpendicular to a top surface of the substrate. The method further comprises forming a filling structure that surrounds the multiple-stack staircase structure, forming a semiconductor channel extending through the multiple-staircase structure, wherein the semiconductor channel comprises unaligned sidewall surfaces, and forming a supporting pillar extending through at least one of the multiple-staircase structure and the filling structure, wherein the supporting pillar comprises aligned sidewall surfaces.

Abstract: A capacitor component includes a body, including a dielectric layer and an internal electrode layer, and an external electrode disposed on the body and connected to the internal electrode layer. At least one hole is formed in the internal electrode layer, and a region, containing at least one selected from the group consisting of indium (In) and tin (Sn), is disposed in the hole. A method of manufacturing a capacitor component includes forming a dielectric green sheet, forming a conductive thin film, including a first conductive material and a second conductive material, on the dielectric green sheet, and sintering the conductive thin film to form an internal electrode layer. The internal electrode layer includes the first conductive material, and a region, including the second conductive material, is formed in the internal electrode layer.

Abstract: The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.

Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.

Abstract: Apparatuses and methods to provide electronic devices having metal films are provided. Some embodiments of the disclosure utilize a metallic tungsten layer as a liner that is filled with a metal film comprising cobalt. The metallic tungsten layer has good adhesion to the cobalt leading to enhanced cobalt gap-fill performance.