Patents by Inventor Yu-Hsien Chen
Yu-Hsien Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990182Abstract: An operation method for a memory device is provided. The memory device includes a two-terminal selector and a resistance variable storage element coupled to the two-terminal selector. The method includes providing a voltage pulse to the memory device. A voltage applied across the two-terminal selector during a falling part of the voltage pulse falls below a holding voltage of the two-terminal selector. A voltage falling rate of the falling part at which the voltage applied across the two-terminal selector reaches the holding voltage is raised for reducing threshold voltage drift of the two-terminal selector.Type: GrantFiled: January 18, 2022Date of Patent: May 21, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hengyuan Lee, Cheng-Hsien Wu, Yu-Sheng Chen, Elia Ambrosi, Chien-Min Lee, Xinyu Bao
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Publication number: 20240161818Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.Type: ApplicationFiled: November 30, 2022Publication date: May 16, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
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Publication number: 20240150656Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, a fourth repeating unit, and a fifth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), the fourth repeating unit has a structure of Formula (IV), and the fifth repeating unit has a structure of Formula (V), a structure of Formula (VI), or a structure of Formula (VII) wherein A1, A2, A3, A4, X1, Z1, R1, R2, R3 and Q are as defined in the specification.Type: ApplicationFiled: September 22, 2023Publication date: May 9, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Lin CHU, Jen-Chun CHIU, Po-Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
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Publication number: 20240155798Abstract: A carrier for different form factors for insertion in a slot of a computing device is disclosed. The different form factors have different thicknesses defined by the E1.S specification. The carrier includes a base holding a first type of form factor. A bezel is configurable for insertion in a slot for a device of the first type of form factor. The bezel has an attachment surface. The base is attachable to the attachment surface of the bezel. A second type of form factor is also attachable to the attachment surface of the bezel. A cover encloses the first type of form factor when joined to the base. The base and cover are discarded when the second type of form factor is attached to the bezel. The attached bezel and second type of form factor may also be inserted in the slot.Type: ApplicationFiled: December 14, 2022Publication date: May 9, 2024Inventors: Yaw-Tzorng TSORNG, Tung-Hsien WU, Yu-Ying TSENG, Wei-Jie CHEN
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Publication number: 20240152187Abstract: A foldable electronic device including a first body, a second body, a hinge module, and a cover is provided. The hinge module is connected to the first body and the second body, such that the first body and the second body are rotated relatively to be folded or unfolded via the hinge module. The hinge module has a protruding rod eccentric to a rotation center of the hinge module. The cover is pivoted to the second body and located on a moving path of the protruding rod. The hinge module drives the cover to be rotated relative to the second body via the protruding rod.Type: ApplicationFiled: October 24, 2023Publication date: May 9, 2024Applicant: Acer IncorporatedInventors: Chun-Hung Wen, Chun-Hsien Chen, Hui-Ping Sun, Wen-Neng Liao, Yu-Ming Lin, Kuan-Lin Chen
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Patent number: 11980040Abstract: A semiconductor device includes a substrate; a memory array over the substrate, the memory array including first magnetic tunnel junctions (MTJs), where the first MTJs are in a first dielectric layer over the substrate; and a resistor circuit over the substrate, the resistor circuit including second MTJs, where the second MTJs are in the first dielectric layer.Type: GrantFiled: June 14, 2021Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tai-Yen Peng, Tsung-Hsien Chang, Yu-Shu Chen, Chih-Yuan Ting, Jyu-Horng Shieh, Chung-Te Lin
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Publication number: 20240133000Abstract: An aluminum alloy material includes 1.0 wt % to 13.0 wt % of Si, 0.2 wt % to 1.4 wt % of Fe, 0.2 wt % to 0.8 wt % of Ni, and the remainder being Al and inevitable impurities. The aluminum alloy material can be 3D printed or die-casted to form an aluminum alloy object with a high thermal conductivity.Type: ApplicationFiled: November 15, 2022Publication date: April 25, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Hsien CHOU, Chi-San CHEN
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Publication number: 20240130686Abstract: A coupled physiological signal measuring device is provided. The coupled physiological signal measuring device includes at least two measuring electrodes, a signal processing unit and a multiplex feedback circuit unit. The measuring electrodes are used to obtain a real-time physiological signal through measurement. The signal processing unit includes a discharge control element. If an electrostatic surge of the real-time physiological signal meets a condition, a discharge control signal is outputted. The multiplex feedback circuit unit is used to discharge the measuring electrodes according to the discharge control signal.Type: ApplicationFiled: January 20, 2023Publication date: April 25, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yun-Yi HUANG, Yu-Chiao TSAI, Hung-Hsien KO, Heng-Yin CHEN
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Patent number: 11968908Abstract: In an embodiment, a method includes: forming a first inter-metal dielectric (IMD) layer over a semiconductor substrate; forming a bottom electrode layer over the first IMD layer; forming a magnetic tunnel junction (MTJ) film stack over the bottom electrode layer; forming a first top electrode layer over the MTJ film stack; forming a protective mask covering a first region of the first top electrode layer, a second region of the first top electrode layer being uncovered by the protective mask; forming a second top electrode layer over the protective mask and the first top electrode layer; and patterning the second top electrode layer, the first top electrode layer, the MTJ film stack, the bottom electrode layer, and the first IMD layer with an ion beam etching (IBE) process to form a MRAM cell, where the protective mask is etched during the IBE process.Type: GrantFiled: June 30, 2022Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yen Peng, Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang, Qiang Fu, Chen-Jung Wang
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Publication number: 20240124706Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.Type: ApplicationFiled: September 22, 2023Publication date: April 18, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-Lin CHU, Jen-Chun CHIU, Po- Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
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Publication number: 20240128876Abstract: A switching control circuit for use in controlling a resonant flyback power converter generates a first driving signal and a second driving signal. The first driving signal is configured to turn on the first transistor to generate a first current to magnetize a transformer and charge a resonant capacitor. The transformer and charge a resonant capacitor are connected in series. The second driving signal is configured to turn on the second transistor to generate a second current to discharge the resonant capacitor. During a power-on period of the resonant flyback power converter, the second driving signal includes a plurality of short-pulses configured to turn on the second transistor for discharging the resonant capacitor. A pulse-width of the short-pulses of the second driving signal is short to an extent that the second current does not exceed a current limit threshold.Type: ApplicationFiled: June 15, 2023Publication date: April 18, 2024Inventors: Yu-Chang Chen, Ta-Yung Yang, Kun-Yu Lin, Fu-Ciao Syu, Chia-Hsien Yang, Hsin-Yi Wu
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Publication number: 20240112957Abstract: A fabrication method is disclosed that includes: forming a first metal layer over first and second semiconductor structures; forming a first patterned photolithographic layer with an opening that exposes a portion of the first metal layer over the first semiconductor structure but not to a boundary between semiconductor structures; removing the exposed portion of the first metal layer; forming a second metal layer over the first and second semiconductor structures; forming a second patterned photolithographic layer with an opening that exposes a portion of the second metal layer over the second semiconductor structure but not to the boundary; removing the exposed portion of the first and second metal layers; wherein a barrier structure is generated between the first and second semiconductor structures that includes remaining portions of the first metal layer and a portion of the second metal layer overlying the remaining portions of the first metal layer.Type: ApplicationFiled: January 12, 2023Publication date: April 4, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Xuan Wang, Cheng-Chun Tseng, Yi-Chun Chen, Yu-Hsien Lin, Ryan Chia-Jen Chen
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Publication number: 20240112924Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.Type: ApplicationFiled: January 5, 2023Publication date: April 4, 2024Inventors: Hsu-Hsien Chen, Chen-Shien Chen, Ting Hao Kuo, Chi-Yen Lin, Yu-Chih Huang
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Patent number: 11942532Abstract: A method includes fabricating a semiconductor device, wherein the method includes depositing a coating layer on a first region and a second region under a loading condition such that a height of the coating layer in the first region is greater than a height of the coating layer in the second region. The method also includes applying processing gas to the coating layer to remove an upper portion of the coating layer such that a height of the coating layer in the first region is a same as a height of the coating layer in the second region.Type: GrantFiled: August 30, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chao-Hsuan Chen, Ming-Chia Tai, Yu-Hsien Lin, Shun-Hui Yang, Ryan Chia-Jen Chen
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Patent number: 11943935Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.Type: GrantFiled: September 26, 2022Date of Patent: March 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
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Publication number: 20240096806Abstract: A method for manufacturing a semiconductor structure is provided. A substrate including a fin structure is received, provided or formed. A sacrificial gate layer is formed over the fin structure and a source/drain structure is formed adjacent to the sacrificial gate layer, wherein the sacrificial gate layer is surrounded by a dielectric structure. The sacrificial gate layer is removed, wherein a recess is defined by the dielectric structure. A work function layer is formed in the recess, wherein the work function layer includes an overhang portion at an opening of the recess. A thickness of the work function layer is reduced. A glue layer is formed over the work function layer. A semiconductor structure thereof is also provided.Type: ApplicationFiled: January 6, 2023Publication date: March 21, 2024Inventors: CHAO-HSUAN CHEN, WEI CHEN HUNG, LI-WEI YIN, YU-HSIEN LIN, YIH-ANN LIN, RYAN CHIA-JEN CHEN
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Patent number: 11915755Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.Type: GrantFiled: January 20, 2022Date of Patent: February 27, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
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Publication number: 20230136128Abstract: An alignment pipeline is arranged on an outer casing and configured to connect to a communication pipe which has a communication pipe axis line. The alignment pipeline includes a pipe body, a connection piece, and a plurality of balls. The pipe body has a pipe body axis line, and includes a first end and a second end opposite to the first end. The first end is configured to connect to the communication pipe. The connection piece surrounds the pipe body, is arranged at the second end, and is movably connected to the outer casing. The plurality of balls is arranged on the connection piece in a rolling and dispersing manner. At least a part of the balls are in contact with the outer casing, so that the connection piece is movable relative to the outer casing along a radial direction of the pipe body axis line.Type: ApplicationFiled: September 2, 2022Publication date: May 4, 2023Inventors: YUN-TENG CHANG, CHENG-SHENG CHANG, YU-HSIEN CHEN
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Publication number: 20190181163Abstract: A thin film transistor and a method of fabricating the same are provided. The thin film transistor includes a channel layer, a source, a drain, an insulating layer and a gate. The channel layer is disposed on a substrate. The source and the drain are disposed separately on the channel layer. The insulating layer covers the source, the drain and the channel layer. The gate is disposed on the insulating layer, wherein two opposite sidewalls of the channel layer are respectively aligned to a sidewall of the source distant to the drain and a sidewall of the drain distant to the source. The thin film transistor of the invention improves the precision of alignment in the fabricating process, such that the film transistor has an excellent quality.Type: ApplicationFiled: February 13, 2018Publication date: June 13, 2019Applicant: Chunghwa Picture Tubes, LTD.Inventors: Hsi-Ming Chang, Yu-Hsien Chen, Yen-Yu Huang
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Publication number: 20190168250Abstract: A thin film coating system includes at least one first supporting roller, a coating device, and at least one drying device. The first supporting roller is configured to rotate based on a rotating central axis. The coating device has an opening. The opening of the coating device faces toward the first supporting roller. The coating device is configured to coat a flowable material toward the first supporting roller along a first direction through the opening. The drying device is located at a side of the rotating central axis adjacent to the coating device in the first direction and is configured to dry the flowable material.Type: ApplicationFiled: January 2, 2018Publication date: June 6, 2019Inventors: Yu-Hsien CHEN, Der-Chun WU, Yen-Yu HUANG