Patents by Inventor Yu-Hsien Huang

Yu-Hsien Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996630
    Abstract: An antenna structure includes a ground element, a first radiation element, a second radiation element, a third radiation element, and a nonconductive support element. The first radiation element is coupled to a first grounding point on the ground element. The second radiation element has a feeding point. The second radiation element is adjacent to the first radiation element. The third radiation element is coupled to a second grounding point on the ground element. The third radiation element is adjacent to the second radiation element. The first radiation element, the second radiation element, and the third radiation element are disposed on the nonconductive support element. The second radiation element is at least partially surrounded by the first radiation element. The third radiation element is at least partially surrounded by the second radiation element.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: May 28, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yu-Chen Zhao, Chung-Ting Hung, Chin-Lung Tsai, Ying-Cong Deng, Kuan-Hsien Lee, Yi-Chih Lo, Kai-Hsiang Chang, Chun-I Cheng, Yan-Cheng Huang
  • Publication number: 20240170381
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Inventors: Chun-Hsien HUANG, Peng-Fu HSU, Yu-Syuan CAI, Min-Hsiu HUNG, Chen-Yuan KAO, Ken-Yu CHANG, Chun-I TSAI, Chia-Han LAI, Chih-Wei CHANG, Ming-Hsing TSAI
  • Publication number: 20240161818
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Publication number: 20240130686
    Abstract: A coupled physiological signal measuring device is provided. The coupled physiological signal measuring device includes at least two measuring electrodes, a signal processing unit and a multiplex feedback circuit unit. The measuring electrodes are used to obtain a real-time physiological signal through measurement. The signal processing unit includes a discharge control element. If an electrostatic surge of the real-time physiological signal meets a condition, a discharge control signal is outputted. The multiplex feedback circuit unit is used to discharge the measuring electrodes according to the discharge control signal.
    Type: Application
    Filed: January 20, 2023
    Publication date: April 25, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yun-Yi HUANG, Yu-Chiao TSAI, Hung-Hsien KO, Heng-Yin CHEN
  • Publication number: 20240112924
    Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Hsu-Hsien Chen, Chen-Shien Chen, Ting Hao Kuo, Chi-Yen Lin, Yu-Chih Huang
  • Publication number: 20240113010
    Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.
    Type: Application
    Filed: September 20, 2023
    Publication date: April 4, 2024
    Inventors: Po-Hsien Huang, Yu-Huei Lee, Hsin-Hung Lin, Chun-Yuan Shih, Lien-Chieh Yu
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20240085753
    Abstract: An electrochromic composition including: a first oxidizable compound; a reducible compound; an electrolyte; and a solvent, wherein the first oxidizable compound is represented by the following formula: wherein X1, and X2 are independently substituted or unsubstituted aliphatic hydrocarbon groups, or substituted or unsubstituted aromatic hydrocarbon groups, wherein the aromatic hydrocarbon groups include: wherein each Rx is independently hydrogen, a C1-C16 alkyl group, a C1-C16 alkoxy group, a C1-C16 haloalkyl group, or halogen.
    Type: Application
    Filed: February 24, 2023
    Publication date: March 14, 2024
    Inventors: Hao-Ping HUANG, Tsung-Hsien LIN, Yu-Nan LEE
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 11915755
    Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Chun-Hsien Huang, Hsin-Chih Yu, Meng-Ping Chuang, Li-Ping Huang, Yu-Fang Chen
  • Patent number: 10677641
    Abstract: An examination method comprises: generating a received audio signal according to sound generated from rotation of the fan by an audio receiving device; performing Fourier transform on the received audio signal to obtain a reference frequency domain signal; recognizing a plurality of characteristic bands according to the reference frequency domain signal; adjusting the received audio signal according to the characteristic bands respectively to form a plurality of casting audio signals corresponding to frequency components in the characteristic bands respectively; playing the casting signals sequentially by an audio casting device; and recognizing at least one key band among the characteristic bands according to the transmission rate of the hard drive upon playing the casting signals.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: June 9, 2020
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Yu-Hsien Huang, Tung-Lin Tsai, Wei-Liang Hsu
  • Publication number: 20190154496
    Abstract: An examination method comprises: generating a received audio signal according to sound generated from rotation of the fan by an audio receiving device; performing Fourier transform on the received audio signal to obtain a reference frequency domain signal; recognizing a plurality of characteristic bands according to the reference frequency domain signal; adjusting the received audio signal according to the characteristic bands respectively to form a plurality of casting audio signals corresponding to frequency components in the characteristic bands respectively; playing the casting signals sequentially by an audio casting device; and recognizing at least one key band among the characteristic bands according to the transmission rate of the hard drive upon playing the casting signals.
    Type: Application
    Filed: January 10, 2018
    Publication date: May 23, 2019
    Applicants: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Yu-Hsien HUANG, Tung-Lin TSAI, Wei-Liang HSU
  • Publication number: 20170154135
    Abstract: A system and a method for validating damping material dynamic property are provided. In the method, a measured platform is established by a viscoelastic material firstly, and then obtains a measured frequency response data. Following up, establish a viscoelastic model for a viscoelastic material, and than derived the viscoelastic function based viscoelastic model. Then, the viscoelastic function is substitute into a dynamic load equation; further obtains a simulation storage modulus and a simulation loss modulus. Then, obtain a simulation frequency response data by the simulation elastic modulus and the simulation viscosity coefficient. Next, obtain the integrated frequency response data according to the reference temperature with an algorithm. Finally, calculating out an elastic modulus value and the viscosity coefficient value by the integrated frequency response data.
    Type: Application
    Filed: March 24, 2016
    Publication date: June 1, 2017
    Inventors: Yu-Hsien HUANG, Wen-Hua CHEN, Hsieh-Liang TSAI
  • Patent number: 8576550
    Abstract: A keyboard fixing structure for fixing a keyboard in an opening of a housing is disclosed. The keyboard fixing structure includes an engaging portion, a first fixing portion, a first flexible connecting portion, a second fixing portion and a second flexible connecting portion. The engaging portion presses a first side of the keyboard in the opening. The first fixing portion is fixed on the housing, and the first flexible connecting portion is connected to the first fixing portion and the engaging portion. The second fixing portion is fixed on the housing, and the second flexible connecting portion is connected to the second fixing portion and the engaging portion. The first flexible connecting portion and the second flexible connecting portion cooperatively provide resilient force to the engaging portion in a first direction for driving the engaging portion to press the first side of the keyboard.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: November 5, 2013
    Assignee: Wistron Corporation
    Inventors: Yu-Hsien Huang, Chi-Chun Chiang, Chih-Hao Chen, Chia-Hsiung Hsueh
  • Publication number: 20130010417
    Abstract: A keyboard fixing structure for fixing a keyboard in an opening of a housing is disclosed. The keyboard fixing structure includes an engaging portion, a first fixing portion, a first flexible connecting portion, a second fixing portion and a second flexible connecting portion. The engaging portion presses a first side of the keyboard in the opening. The first fixing portion is fixed on the housing, and the first flexible connecting portion is connected to the first fixing portion and the engaging portion. The second fixing portion is fixed on the housing, and the second flexible connecting portion is connected to the second fixing portion and the engaging portion. The first flexible connecting portion and the second flexible connecting portion cooperatively provide resilient force to the engaging portion in a first direction for driving the engaging portion to press the first side of the keyboard.
    Type: Application
    Filed: January 5, 2012
    Publication date: January 10, 2013
    Inventors: Yu-Hsien Huang, Chi-Chun Chiang, Chih-Hao Chen, Chia-Hsiung Hsueh
  • Patent number: 8339793
    Abstract: An electronic device includes: first and second housing bodies cooperating to form an inner receiving space; a motherboard disposed in the inner receiving space, partitioned by a partition line into a port zone having at least one input/output connector, and a non-port zone; first and second waterproof strips disposed respectively between the first housing body and the motherboard and between the second housing body and the motherboard, and disposed at the partition line, the second waterproof strip having opposite ends formed with respective extension parts extending perpendicularly toward the first waterproof strip and disposed at the peripheral edge of the motherboard; and a third waterproof strip connected to the first waterproof strip to form a closed seal ring therewith, disposed between the first and second housing bodies, and disposed at an outer side of a peripheral edge of the non-port zone.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: December 25, 2012
    Assignee: Wistron Corporation
    Inventors: Yu-Han Tsai, Chun-Wang Lin, Yu-Hsien Huang, Chi-Jen Lo, Feng-Hsiung Wu
  • Patent number: 8218298
    Abstract: A door mechanism includes a main body whereon an opening is formed. The main body is for shielding a slot on a casing of an electronic device. The door mechanism further includes a first resilient component. One end of the first resilient component is fixed inside the main body. The door mechanism further includes a shaft including a pivoting portion pivoted to the casing of the electronic device so that the main body is capable of rotating relative to the casing. The shaft further includes an extending portion. One end of the extending portion is connected to the pivoting portion, and the other end of the extending portion passes through the opening and is connected to the other end of the first resilient component. The main body is capable of moving relative to the pivoting portion due to deformation of the first resilient component.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: July 10, 2012
    Assignee: Wistron Corporation
    Inventors: Yu-Han Tsai, Chun-Wang Lin, Yu-Hsien Huang, Yi-Chen Li, Chi-Jen Lo, Feng-Hsiung Wu
  • Publication number: 20110141669
    Abstract: A door mechanism includes a main body whereon an opening is formed. The main body is for shielding a slot on a casing of an electronic device. The door mechanism further includes a first resilient component. One end of the first resilient component is fixed inside the main body. The door mechanism further includes a shaft including a pivoting portion pivoted to the casing of the electronic device so that the main body is capable of rotating relative to the casing. The shaft further includes an extending portion. One end of the extending portion is connected to the pivoting portion, and the other end of the extending portion passes through the opening and is connected to the other end of the first resilient component. The main body is capable of moving relative to the pivoting portion due to deformation of the first resilient component.
    Type: Application
    Filed: June 30, 2010
    Publication date: June 16, 2011
    Inventors: Yu-Han Tsai, Chun-Wang Lin, Yu-Hsien Huang, Yi-Chen Li, Chi-Jen Lo, Feng-Hsiung Wu
  • Publication number: 20100328906
    Abstract: An electronic device includes: first and second housing bodies cooperating to form an inner receiving space; a motherboard disposed in the inner receiving space, partitioned by a partition line into a port zone having at least one input/output connector, and a non-port zone; first and second waterproof strips disposed respectively between the first housing body and the motherboard and between the second housing body and the motherboard, and disposed at the partition line, the second waterproof strip having opposite ends formed with respective extension parts extending perpendicularly toward the first waterproof strip and disposed at the peripheral edge of the motherboard; and a third waterproof strip connected to the first waterproof strip to form a closed seal ring therewith, disposed between the first and second housing bodies, and disposed at an outer side of a peripheral edge of the non-port zone.
    Type: Application
    Filed: October 14, 2009
    Publication date: December 30, 2010
    Inventors: Yu-Han TSAI, Chun-Wang LIN, Yu-Hsien HUANG, Chi-Jen LO, Feng-Hsiung WU