Patents by Inventor Yu-Hsin Yeh

Yu-Hsin Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972982
    Abstract: In a method of manufacturing a semiconductor device, a fin structure is formed by patterning a semiconductor layer, and an annealing operation is performed on the fin structure. In the patterning of the semiconductor layer, a damaged area is formed on a sidewall of the fin structure, and the annealing operation eliminates the damaged area.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hsiung Tsai, Yu-Ming Lin, Kuo-Feng Yu, Ming-Hsi Yeh, Shahaji B. More, Chandrashekhar Prakash Savant, Chih-Hsin Ko, Clement Hsingjen Wann
  • Publication number: 20240114591
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE sends a request message to a core network. The request message requests joining one or more requested multicast broadcast service (MBS) sessions. The UE receives a response message from the core network. The response message contains received MBS information indicating one or more admitted MBS sessions. The received MBS information includes a respective IP address type (IPAT) field. The IPAT field indicates a type of an IP address corresponding to each of the one or more admitted MBS sessions. The UE decodes the IP address corresponding to each of the one or more admitted MBS sessions according to the type indicated by the respective IPAT field.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 4, 2024
    Inventors: Yu-Hsin Lin, Shao-Liang Yeh, Yuan-Chieh Lin
  • Patent number: 8343617
    Abstract: A Ceramic substrate is provided. The ceramic substrate includes a ceramic main body and a planar buffer layer on the ceramic main body. Further, the coefficient of thermal expansion of the ceramic main body CTEm and the coefficient of thermal expansion of the planar buffer layer CTEp satisfy the following mathematical relationship: |CTEm?CTEp|?3×10?6/° C.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: January 1, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Yu-Hsin Yeh, Tzer-Shen Lin, Ren-Der Jean
  • Publication number: 20110014423
    Abstract: A ceramic powder composition and an optoelectronic device substrate utilizing the ceramic powder composition are disclosed. The optoelectronic device substrate is formed by sintering a ceramic powder composition including 4 to 97 wt % (weight percent) of zircon, 0 to 60 wt % of silicon dioxide, and 0 to 80 wt % of alumina, wherein the sintered ceramic substrate includes first and second crystalline phases, the first crystalline phase is zircon, and the second crystalline phase is at least one of or a combination of alumina, silicon dioxide, and zirconia crystalline phases, furthermore, the second crystalline phase can also includes a mullite crystalline phase.
    Type: Application
    Filed: December 31, 2009
    Publication date: January 20, 2011
    Inventors: Yu-Hsin YEH, Jiin-Jyh Shyu, Ren-Der Jean, Tzer-Shen Lin
  • Publication number: 20100260970
    Abstract: A Ceramic substrate is provided. The ceramic substrate includes a ceramic main body and a planar buffer layer on the ceramic main body. Further, the coefficient of thermal expansion of the ceramic main body CTEm and the coefficient of thermal expansion of the planar buffer layer CTEp satisfy the following mathematical relationship: |CTEm?CTEp|?3×10?6/° C.
    Type: Application
    Filed: January 21, 2010
    Publication date: October 14, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Hsin Yeh, Tzer-Shen Lin, Ren-Der Jean
  • Publication number: 20100224242
    Abstract: A photoelectric converting device which includes a substrate layer and an active layer is proposed. The active layer, which is disposed over the substrate layer, has a light receiving surface with a textured structure. The textured structure includes multiple indented units and each of the indented units includes three planes, which form an indentation tip at the intersection point between the three planes. The three planes are perpendicular or about perpendicular to each other.
    Type: Application
    Filed: May 14, 2009
    Publication date: September 9, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: You-Chia Chang, Chun-Ti Chen, Jen-You Chu, Yu-Hsin Yeh