Abstract: A high atomic number material is applied to one or more surfaces of a semiconductor structure of a wafer. The one or more surfaces are at a depth different from a depth of a surface of the wafer. An electron beam is scanned over the semiconductor structure to cause a backscattered electron signal to be collected at a collector. A profile scan of the semiconductor structure is generated based on an intensity of the backscattered electron signal, at the collector, resulting from the high atomic number material. The high atomic number material increases the intensity of the backscattered electron signal for the one or more surfaces of the semiconductor structure such that contrast in the profile scan is increased. The increased contrast of the profile scan enables accurate critical dimension measurements of the semiconductor structure.

Abstract: A virtual metrology method using a convolutional neural network (CNN) is provided. In this method, a dynamic time warping (DTW) algorithm is used to delete unsimilar sets of process data, and adjust the sets of process data to be of the same length, thereby enabling the CNN to be used for virtual metrology. A virtual metrology model of the embodiments of the present invention includes several CNN models and a conjecture model, in which plural inputs of the CNN model are sets of time sequence data of respective parameters, and plural outputs of the CNN models are inputs to the conjecture model.

Abstract: A bicycle front derailleur is provided, including: a base, configured to be mounted to a bicycle frame; a linkage mechanism, including a connection portion configured to be connected with a cable, the linkage mechanism being swingably connected to the base; a chain guide, swingably connected to the linkage mechanism; and an adjustment assembly, disposed on the base, including a holder movably disposed on the base and an adjustment member, the holder being configured to be connected with a sheath for driving the cable, the adjustment member being movably disposed on the base and adjustable to drive the holder to move relative to the base.

Abstract: Materials for binding per- and polyfluoroalkyl substances (PFAS) are disclosed. A fluidic device comprising the materials for detection and quantification of PFAS in a sample is disclosed. The fluidic device may be configured for multiplexed analyses. Also disclosed are methods for sorbing and remediating PFAS in a sample. The sample may be groundwater containing, or suspected of containing, one or more PFAS.

Abstract: A rear derailleur is provided, including: a base, configured to be mounted to a bicycle; a linkage assembly, connected to the base; a movable member, rotatably connected to the linkage assembly; a chain guide, rotatably connected to the movable member by an axle assembly; a biasing member, located between the movable member and the chain guide, positioned to the movable member and the chain guide; a resistance mechanism, connected to the movable member; and a cap member, covering the resistance mechanism and driving the resistance mechanism, rotatably positionable in either of a first position and a second position, wherein when the cap member is positioned in the first position, the resistance mechanism provides a first resistance, and when the cap member is positioned in the second position, the resistance mechanism provides a second resistance which is different from the first resistance.

Abstract: A rear derailleur is provided, including: a base, configured to be mounted to a bicycle; a linkage assembly, connected to the base; a movable member, rotatably connected to the linkage assembly; a chain guide, rotatably connected to the movable member by an axle assembly; a biasing member, located between the movable member and the chain guide, positioned to the movable member and the chain guide; a resistance mechanism, connected to the movable member; and a cap member, covering the resistance mechanism and driving the resistance mechanism, rotatably positionable in either of a first position and a second position, wherein when the cap member is positioned in the first position, the resistance mechanism provides a first resistance, and when the cap member is positioned in the second position, the resistance mechanism provides a second resistance which is different from the first resistance.

Abstract: A rear derailleur is provided, including: a base, configured to be mounted to a bicycle; a movable member, movably disposed on the base; a shaft, rotatably connected to the movable member; a chain guide, connected to the shaft; a biasing member, disposed between the chain guide and the movable member; a resistance mechanism, connected to the movable member to apply frictional resistance to the shaft.

Abstract: A voltage level shifter includes an input transistor, a control circuit, a reset circuit, and a keeper circuit. The input transistor is configured to receive an input voltage and a first reference voltage. The control circuit is configured to generate a pulse voltage according to the input voltage and one of a node voltage, an output voltage, and an inversion input voltage. The reset circuit is configured to receive the first reference voltage and a second reference voltage and controlled by the pulse voltage. The reset circuit is coupled to the input transistor at a first node where the node voltage is generated. The keeper circuit is coupled to the first node and configured to generate the output voltage according to the node voltage, the first reference voltage, the second reference voltage, and the output voltage.

Abstract: A bicycle front derailleur is provided, including: a base, configured to be mounted to a bicycle frame; a linkage mechanism, including a connection portion configured to be connected with a cable, the linkage mechanism being swingably connected to the base; a chain guide, swingably connected to the linkage mechanism; and an adjustment assembly, disposed on the base, including a holder movably disposed on the base and an adjustment member, the holder being configured to be connected with a sheath for driving the cable, the adjustment member being movably disposed on the base and adjustable to drive the holder to move relative to the base.

Abstract: Materials for binding per- and polyfluoroalkyl substances (PFAS) are disclosed. A fluidic device comprising the materials for detection and quantification of PFAS in a sample is disclosed. The fluidic device may be configured for multiplexed analyses. Also disclosed are methods for sorbing and remediating PFAS in a sample. The sample may be groundwater containing, or suspected of containing, one or more PFAS.

Abstract: A data storage apparatus and a method for preventing data error using the same are provided. The data storage apparatus includes a memory and a memory controller. The memory includes a plurality of blocks. The memory controller is coupled to the memory and configured to perform the following operations: recording a read count of a target block of the memory; performing an error bit check on a free storage space of the target block when the read count of the target block meets a condition; and programming a dummy data to the free storage space of the target block in response to the determination that the check result is negative.

Abstract: A data storage apparatus and a method for preventing data error using the same are provided. The data storage apparatus includes a memory and a memory controller. The memory includes a plurality of blocks. The memory controller is coupled to the memory and configured to perform the following operations: recording a read count of a target block of the memory; performing an error bit check on a free storage space of the target block when the read count of the target block meets a condition; and programming a dummy data to the free storage space of the target block in response to the determination that the check result is negative.

Abstract: A method for determining a resistance calibration direction in ZQ calibration of a memory device includes: repeatedly comparing a reference voltage with an target voltage by a comparator to obtain an odd plurality of comparison outputs, each of the comparison outputs being one of a high-level state and a low-level state; determining a majority of the comparison outputs for their states by a ZQ calibration controller; and determining a resistance calibration direction according to the majority by the ZQ calibration controller so that the ZQ calibration controller generates a calibration code based on the resistance calibration direction and applies the calibration code to a resistance calibration unit to adjust the target voltage via the resistance calibration unit.

Abstract: An image sensor including a substrate, a trench isolation, a plurality of image sensing units, at least one phase detection unit, and an interconnection layer is provided. The trench isolation is in the substrate, and a plurality of active areas of the substrate are separated from each other by the trench isolation. The image sensing units and the at least one phase detection unit are in the active areas arranged in an array, and a sensing area of the at least one phase detection unit is smaller than a sensing area of each of the image sensing units. The interconnection layer is disposed on the image sensing units and the at least one phase detection unit. In addition, a method of fabricating an image sensor is also provided.

Abstract: An image sensor including a substrate, a trench isolation, a plurality of image sensing units, at least one phase detection unit, and an interconnection layer is provided. The trench isolation is in the substrate, and a plurality of active areas of the substrate are separated from each other by the trench isolation. The image sensing units and the at least one phase detection unit are in the active areas arranged in an array, and a sensing area of the at least one phase detection unit is smaller than a sensing area of each of the image sensing units. The interconnection layer is disposed on the image sensing units and the at least one phase detection unit. In addition, a method of fabricating an image sensor is also provided.

Abstract: An example of the invention provides a digital delay unit that is made up of a plurality of NAND gates. The digital delay unit includes a first delay path and a second delay path. The first delay path is coupled between a first input terminal and an output terminal to provide a basic time delay which is caused by one NAND gate. The second delay path is coupled between a second input terminal and the output terminal to provide at least three basic time delays.

Abstract: An example of the invention provides a digital delay unit that is made up of a plurality of NAND gates. The digital delay unit includes a first delay path and a second delay path. The first delay path is coupled between a first input terminal and an output terminal to provide a basic time delay which is caused by one NAND gate. The second delay path is coupled between a second input terminal and the output terminal to provide at least three basic time delays.

Abstract: A phase detector, arranged for comparing a phase of a first clock with a phase of a second clock. The phase detector includes a phase detection stage and a metastable prevention stage. The phase detection stage is arranged to receive the first clock and the second clock, and to output a phase comparison result in accordance with the phase of the first clock and the phase of the second clock. The metastable prevention stage is arranged to receive the phase comparison result, and to output a stable phase comparison result in accordance with the phase comparison result.

Abstract: A phase detector, arranged for comparing a phase of a first clock with a phase of a second clock. The phase detector includes a phase detection stage and a metastable prevention stage. The phase detection stage is arranged to receive the first clock and the second clock, and to output a phase comparison result in accordance with the phase of the first clock and the phase of the second clock. The metastable prevention stage is arranged to receive the phase comparison result, and to output a stable phase comparison result in accordance with the phase comparison result.