Abstract: A polymer is formed by a reaction of phenolic epoxy resin or bisphenol epoxy resin and carboxylic acid, wherein the phenolic epoxy resin has a chemical structure of wherein W is H, alkyl group, or halogen. R1 is methylene, methylene diphenyl, dimethylene benzene, tetrahydrodicyclopentadiene, or n=1 to 8. The bisphenol epoxy resin has a chemical structure of wherein Z is H or alkyl group; R4 is methylene, methylmethylene, dimethylmethylene, ethylmethylmethylene, bi(trifluoromethyl)methylene, fluorenylidene, or sulfonyl group; and p=1 to 10. The carboxylic acid has a chemical structure of HOOC—Ar—(—X)m, HOOC—R2, or a combination thereof, wherein Ar is benzene or naphthalene; X is hydroxy group, alkoxy group, or alkyl group, and at least one X is hydroxy group; m=1 to 3, wherein R2 is C3-7 alkyl group.

Abstract: A camera module suited for assembled in a casing is provided. The camera module includes a camera and a switch cover. The camera is disposed in the casing and aligned with a camera hole of the casing. The switch cover is slidably disposed in the casing, wherein the switch cover includes a sliding member and a shielding member secured to the sliding member, and a thickness of the shielding member is less than a thickness of the sliding member. The camera hole is seated on a sliding path of the shielding member. The shielding member is suited for blocking between the camera and the camera hole or moving out between the camera and the camera hole. An electronic device is also provided.

Abstract: A purification apparatus and a method of purifying hot zone parts are provided. The purification apparatus is configured to remove impurities attached on at least one hot zone part. The purification apparatus includes a crystal high temperature furnace, an enclosed box disposed in the crystal high temperature furnace, an outer tube connected to the crystal high temperature furnace and the enclosed box, an inner tube disposed in the outer tube, and a gas inlet cover connected to the outer tube. The crystal high temperature furnace includes a furnace body, a furnace cover, and a thermal field module disposed in the furnace body. The gas inlet cover is configured to input a noble gas into the enclosed box through the inner tube, and the thermal field module is configured to heat the noble gas so that the impurities are heated and vaporized through the noble gas.

Abstract: An antenna module includes an antenna box and a first connection wire. The antenna box can include a first antenna, a second antenna, a first connection terminal, a second connection terminal and a housing. The first and second antennas are located in the housing and the housing has a first opening collectively exposing a portion of the first connection terminal and a portion of the second connection terminal. Each of the first and second antennas is adapted to receive or transmit wireless signals according to one of a plurality of wireless communication standards and the first and second antennas are electrically connected to the first and second connection terminals, respectively. The wireless communication standards can be different from each other.

Abstract: A manufacturing method of a package-on-package structure includes at least the following steps. Top packages are mounted on a top side of a reconstructed wafer over a flexible tape, where conductive bumps at a bottom side of the reconstructed wafer is attached to the flexible tape, and during the mounting, a shape geometry of the respective conductive bump changes and at least a lower portion of the respective conductive bump is embraced by the flexible tape. The flexible tape is released from the conductive bumps after the mounting.

Abstract: A method of monitoring a clock signal of a server is provided. The server includes a phase-locked loop (PLL), a baseboard management controller (BMC), and a light emitting unit. The method includes steps of: A) the server executing a time synchronization service to obtain a synchronization mode that the PLL is operating in, where the synchronization mode is one of a free-run mode, a locked mode, and a holdover mode; B) the server updating the synchronization mode to the BMC when executing the time synchronization service; and C) the BMC storing the synchronization mode and controlling the light emitting unit to display in one of a plurality of displaying manners that corresponds to the synchronization mode.

Abstract: An electronic device is provided, including a main body and a camera module. The camera module has a frame, a lens unit disposed in the frame, a guiding member, and a hinge. The guiding member is affixed to the main body and has a rail and a spring sheet. The hinge pivotally connects to the frame and the guiding member. When the camera module is in the retracted position, the camera module is hidden in a recess of the main body. When the camera module slides out of the recess from the retracted position along the rail into the operational position, the spring sheet is pressed by the hinge to increase the friction between the hinge and the guiding member.

Abstract: A method includes forming a dummy gate over a semiconductor fin; forming a source/drain epitaxial structure over the semiconductor fin and adjacent to the dummy gate; depositing an interlayer dielectric (ILD) layer to cover the source/drain epitaxial structure; replacing the dummy gate with a gate structure; forming a dielectric structure to cut the gate structure, wherein a portion of the dielectric structure is embedded in the ILD layer; recessing the portion of the dielectric structure embedded in the ILD layer; after recessing the portion of the dielectric structure, removing a portion of the ILD layer over the source/drain epitaxial structure; and forming a source/drain contact in the ILD layer and in contact with the portion of the dielectric structure.

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.

Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.

Abstract: An information handling system includes a host processing system and a Liquid Crystal Display device. The host processing system includes a graphics processing unit (GPU) and the LCD device includes a memory device and a DisplayPort Configuration Data (DPCD) register. The host processing system 1) determines whether the first GPU supports a Dynamic Display Shifting (DDS) mode, 2) when the GPU does not support the DDS mode, provides a first indication to the LCD device that the GPU does not support the DDS mode, and 3) when the GPU supports the DDS mode, provides a second indication to the LCD device that the GPU supports the DDS mode. The LCD device retrieves a Panel Self Refresh (PSR) setting from the memory device and stores the PSR setting to the DPCD register in response to the first indication, and retrieves a DDS setting from the memory and stores the DDS setting to the DPCD register in response to the second indication.

Abstract: An electrical connector assembly includes: a bracket; and at least one transmission assembly mounted to the bracket and including an internal printed circuit board (PCB), a board-mount connector connected to a first row of conductive pads disposed at a bottom end portion of the PCB, and a plug-in connector connected to a second row of conductive pads disposed at a front end portion of the PCB, wherein the PCB has a third row of conductive pads disposed at a rear end portion thereof.

Abstract: A method of manufacturing a carrying substrate is provided. At least one circuit component is disposed on a first circuit structure. An encapsulation layer is formed on the first circuit structure and encapsulates the circuit component. A second circuit structure is formed on the encapsulation layer and electrically connected to the circuit component. The circuit component is embedded in the encapsulation layer via an existing packaging process. Therefore, the routing area is increased, and a package substrate requiring a large size has a high yield and low manufacturing cost.

Abstract: A method for fabricating an optoelectronic device includes forming an isolation structure between an array of pixel electrodes and a built-in pad (BIP) on a dielectric layer of an integrated circuit, depositing a photosensitive film over the dielectric layer, such that at least one pinch point is formed in the photosensitive film at an edge of the isolation structure. The method further includes depositing an electrode layer, which is at least partially transparent, over the photosensitive film, etching away the photosensitive film from the BIP, and after etching away the photosensitive film, depositing a metal layer over the BIP and in contact with the electrode layer.

Abstract: The present disclosure provides a level-shift circuit and a display device. The level-shift circuit includes a logic setting unit, a control unit, a first field effect transistor, a second field effect transistor, and an over-current protection module. An input terminal of the logic setting unit is input with an initial signal. An output terminal of the logic setting unit is connected with an input terminal of the control unit. The over-current protection module is configured to reduce a resistance of the level-shift circuit when the level-shift circuit is in an initial stage, and increase the resistance of the level-shift circuit when the level-shift circuit is in a working stage.

Abstract: An outdoor flat panel display assembly is provided to redesign the back cover of a display module where an isolated external circulation structure may be implemented to the back cover of the display module and the back plate of the case. Cold air is introduced into the heat dissipation space within the back cover via external circulating route while heat produced by the backlight, the system circuit board, and by the radiation of the sun can be dissipated through the external circulating route. The external circulation space is completely isolated from the internal space of the case in such a way that the vapor and dust in the introduced cold air are in no way to have contact with the components of the display and the glass of the case.