Patents by Inventor Yu-Jiau Hwang

Yu-Jiau Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080265410
    Abstract: A wafer level package includes a substrate, a passivation layer, an elastic layer, a first insulation layer, a metal trace, a second insulation layer, and a bump. The passivation layer is formed on the substrate, and has one pad. The elastic layer is formed on the passivation layer. The first insulation layer is formed on the passivation layer and the elastic layer, and has a junction in contact with the pad. The metal trace is formed on the first insulation layer. The second insulation layer is formed on the metal trace, and a groove is formed correspondingly above the elastic layer. The bump is formed in the groove. An annular trench can be further formed around the bump. A groove can be furthermore formed in the first insulation layer correspondingly below the bump.
    Type: Application
    Filed: October 30, 2007
    Publication date: October 30, 2008
    Inventors: Shu-Ming Chang, Yu-Jiau Hwang, Yuan-Chang Lee