Abstract: A method of manufacturing a semiconductor structure is provided. A conductive layer is formed on a precursor memory structure. A target layer is formed on the conductive layer. A first photoresist with a first opening is formed on the target layer. A spacer is formed on sidewalls of the first opening. A second photoresist with a second opening is formed on the target layer and the spacer. The target layer is patterned by the second photoresist and the spacer to form a first patterned target layer. A third photoresist with a third opening is formed on the first patterned target layer. The first patterned target layer is patterned by the third photoresist to form a second patterned target layer. The conductive layer is patterned by the second patterned target layer to form a patterned conductive layer including a ring structure aligned with a source/drain region.

Abstract: A method for manufacturing a package structure includes: providing a first electrical element and a second electrical element on a surface of a first carrier, wherein the second electrical element is shifted with respect to the first electrical element; and moving the first electrical element along at least one direction substantially parallel with the surface of the first carrier until a first surface of the first electrical element is substantially aligned with a first surface of the second electrical element from a top view.

Abstract: An integrated circuit (IC) device includes a redistribution line over a substrate, wherein a first angle between a topmost surface of the redistribution line and a sidewall of the redistribution line is within a first angle range, a second angle between a bottommost surface of the redistribution line and the sidewall of the redistribution line is within a second angle range, and the second angle range is different from the first angle range. The IC device further includes a passivation layer over the redistribution line, wherein a bottommost surface of the passivation layer is below the bottommost surface of the redistribution line.

Abstract: A semiconductor structure includes a first dielectric layer, a second dielectric layer on the first dielectric layer, a capacitor structure in the first dielectric layer and the second dielectric layer, a third dielectric layer on the second dielectric layer, a word line, a channel structure, and a gate dielectric. The word line is located in the third dielectric layer and extends across the capacitor structure. The channel structure is located in the third dielectric layer and surrounds the word line and a portion of the third dielectric layer. The gate dielectric has a first portion and a second portion separated from the first portion, wherein the first portion is between a sidewall of the word line and the channel structure, and the second portion is between an inner sidewall of the third dielectric layer and the channel structure.

Abstract: A semiconductor device package includes a substrate, a reflector, a radiator and a first director. The reflector is disposed on a surface of the substrate. The radiator is disposed over the reflector. The first director is disposed over the radiator. The reflector, the radiator and the first director have different elevations with respect to the surface of the substrate. The radiator and the first director define an antenna.

Abstract: An electronic package is provided. The electronic package includes a first circuit structure, a second circuit structure, and an underfill. The second circuit structure is disposed over the first circuit structure. The underfill is disposed between the first circuit structure and the second circuit structure. An inner portion of the underfill has an inner lateral surface adjacent to and is substantially conformal with a lateral surface of the second circuit structure. A first top end of the inner lateral surface is not level with a top surface of the second circuit structure. An outer portion of the underfill has a second top end higher than the first top end.

Abstract: An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.

Abstract: An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.

Abstract: A semiconductor device package includes a dielectric layer, a package body and a protection structure. The dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The package body is disposed on the first surface of the dielectric layer. The package body covers a first portion of the lateral surface of the dielectric layer and exposes a second portion of the lateral surface of the dielectric layer. The protection structure is disposed on the second portion of the lateral surface of the dielectric layer.

Abstract: A disposable patient isolation hood is provided and includes a frame and an isolation element, wherein the frame includes a base and a support bridge, and two ends of the support bridge are respectively connected to the first end portion and the second end portion of the base. The isolation element is flexible, and at least a part thereof is made of a transparent material. The isolation element is arranged to cover the support bridge to form a space that can encompass at least a part of the subject in need. The disposable patient isolation hood is easy to carry and has high mobility, so that medical practitioners can be isolated and protected during medical treatment of patients even in the absence of medical resources or in emergency situations.

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit structure. The circuit structure includes a dielectric layer and a bonding pad. The dielectric layer has a first dielectric surface and a second dielectric surface opposite to the first dielectric surface, where the dielectric layer defines a recess in the first dielectric surface, and the recess includes a sidewall. The bonding pad is disposed in the recess, where a first pad surface of the bonding pad is adjacent to the first dielectric surface, a second pad surface of the bonding pad is adjacent to the second dielectric surface, and an edge of the bonding pad is spaced from the sidewall of the recess by a first distance.

Abstract: A semiconductor device package includes a substrate, a reflector, a radiator and a first director. The reflector is disposed on a surface of the substrate. The radiator is disposed over the reflector. The first director is disposed over the radiator. The reflector, the radiator and the first director have different elevations with respect to the surface of the substrate. The radiator and the first director define an antenna.

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit structure. The circuit structure includes a dielectric layer and a bonding pad. The dielectric layer has a first dielectric surface and a second dielectric surface opposite to the first dielectric surface, where the dielectric layer defines a recess in the first dielectric surface, and the recess includes a sidewall. The bonding pad is disposed in the recess, where a first pad surface of the bonding pad is adjacent to the first dielectric surface, a second pad surface of the bonding pad is adjacent to the second dielectric surface, and an edge of the bonding pad is spaced from the sidewall of the recess by a first distance.

Abstract: A semiconductor device package includes a carrier, a patterned passivation layer and a first patterned conductive layer. The patterned passivation layer is disposed on the carrier. The first patterned conductive layer is disposed on the carrier and surrounded by the patterned passivation layer. The first patterned conductive layer has a first portion and a second portion electrically disconnected from the first portion. The first portion has a first surface adjacent to the carrier and exposed by the patterned passivation layer. The second portion has a first surface adjacent to the carrier exposed by the patterned passivation layer. The first surface of the first portion is in direct contact with an insulation medium.

Abstract: A semiconductor device package includes a carrier, a patterned passivation layer and a first patterned conductive layer. The patterned passivation layer is disposed on the carrier. The first patterned conductive layer is disposed on the carrier and surrounded by the patterned passivation layer. The first patterned conductive layer has a first portion and a second portion electrically disconnected from the first portion. The first portion has a first surface adjacent to the carrier and exposed by the patterned passivation layer. The second portion has a first surface adjacent to the carrier exposed by the patterned passivation layer. The first surface of the first portion is in direct contact with an insulation medium.

Abstract: A semiconductor device package includes a dielectric layer, a package body and a protection structure. The dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The package body is disposed on the first surface of the dielectric layer. The package body covers a first portion of the lateral surface of the dielectric layer and exposes a second portion of the lateral surface of the dielectric layer. The protection structure is disposed on the second portion of the lateral surface of the dielectric layer.

Abstract: A substrate structure includes a dielectric layer, a first circuit layer, at least one conductive structure and a first protective layer. The first circuit layer is disposed adjacent to a first surface of the dielectric layer. The conductive structure includes a first portion and a second portion. The first portion is disposed on the first circuit layer. The first protective layer is disposed on the dielectric layer and contacts at least a portion of a sidewall of the first portion of the conductive structure. The first circuit layer and the conductive structure are integrally formed.

Abstract: A semiconductor substrate includes a dielectric layer, a heat dissipation structure and a first patterned conductive layer. The dielectric layer has a surface. The heat dissipation structure is surrounded by the dielectric layer. The heat dissipation structure defines a space and includes a liquid in the space. The first patterned conductive layer is disposed adjacent to the surface of the dielectric layer and thermally connected with the heat dissipation structure.

Abstract: A semiconductor substrate includes a dielectric layer, a first patterned conductive layer and a first connection element. The dielectric layer has a first surface. The first patterned conductive layer has a first surface and is disposed adjacent to the first surface of the dielectric layer. The first connection element is disposed on the first surface of the first patterned conductive layer. The first connection element includes a first portion, a second portion and a seed layer disposed between the first portion and the second portion. The first portion of the first connection element and the first patterned conductive layer are formed to be a monolithic structure.

Abstract: A semiconductor substrate includes a dielectric layer, a heat dissipation structure and a first patterned conductive layer. The dielectric layer has a surface. The heat dissipation structure is surrounded by the dielectric layer. The heat dissipation structure defines a space and includes a liquid in the space. The first patterned conductive layer is disposed adjacent to the surface of the dielectric layer and thermally connected with the heat dissipation structure.