Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

Abstract: A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.

Abstract: A method for manufacturing a semiconductor structure includes disposing a wafer in a processing chamber, in which the wafer is laterally surrounded by a focus ring. A plasma is formed in the processing chamber to process the wafer. A thickness of the focus ring is detected. A plasma direction of the plasma over a peripheral region of the wafer is adjusted according to the thickness of the focus ring.

Abstract: The present disclosure describes an exemplary etch process in a reactor that includes a shower head and an electrostatic chuck configured to receive a radio frequency (RF) power. The shower head includes a top plate and a bottom plate with one or more gas channels that receive incoming gases. The method can include (i) rotating the top plate or the bottom plate of the shower head to a first position to allow a gas to flow through the shower head; (ii) performing a surface modification cycle that includes: applying a negative direct current (DC) bias voltage to the shower head, applying an RF power signal to the wafer chuck; and (iii) performing an etching cycle that includes: removing the negative DC bias voltage from the shower head and lowering the RF power signal applied to the wafer chuck.

Abstract: Methods to form low-k dielectric materials for use as intermetal dielectrics in multilevel interconnect systems, along with their chemical and physical properties, are provided. The deposition techniques described include PECVD, PEALD, and ALD processes where the precursors such as TEOS and MDEOS may provide the requisite 0-atoms and O2 gas may not be used as one of the reactants. The deposition techniques described further include PECVD, PEALD, and ALD processes where O2 gas may be used and, along with the O2 gas, precursors containing embedded Si—O—Si bonds, such as (CH3O)3—Si—O—Si—(CH3O)3) and (CH3)3—Si—O—Si—(CH3)3 may be used.

Abstract: A method includes mounting a wafer on a chuck disposed within a chamber of an etching system, the wafer being encircled by a focus ring. While etching portions of the wafer, an etch direction is adjusted to a first desired etch direction by adjusting a vertical position of the focus ring relative to the wafer to a first desired vertical position. While etching portions of the wafer, the etch direction is adjusted to a second desired etch direction by adjusting the vertical position of the focus ring relative to the wafer to a second desired vertical position. The second desired vertical position is different from the first desired vertical position. The second desired etch direction is different from the first desired etch direction.

Abstract: Methods to form low-k dielectric materials for use as intermetal dielectrics in multilevel interconnect systems, along with their chemical and physical properties, are provided. The deposition techniques described include PECVD, PEALD, and ALD processes where the precursors such as TEOS and MDEOS may provide the requisite O-atoms and O2 gas may not be used as one of the reactants. The deposition techniques described further include PECVD, PEALD, and ALD processes where O2 gas may be used and, along with the O2 gas, precursors containing embedded Si—O—Si bonds, such as (CH3O)3—Si—O—Si—(CH3O)3) and (CH3)3—Si—O—Si—(CH3)3 may be used.

Abstract: A method includes mounting a wafer on a chuck disposed within a chamber of an etching system, the wafer being encircled by a focus ring. While etching portions of the wafer, an etch direction is adjusted to a first desired etch direction by adjusting a vertical position of the focus ring relative to the wafer to a first desired vertical position. While etching portions of the wafer, the etch direction is adjusted to a second desired etch direction by adjusting the vertical position of the focus ring relative to the wafer to a second desired vertical position. The second desired vertical position is different from the first desired vertical position. The second desired etch direction is different from the first desired etch direction.

Abstract: The present disclosure describes an exemplary etch process in a reactor that includes a shower head and an electrostatic chuck configured to receive a radio frequency (RF) power. The shower head includes a top plate and a bottom plate with one or more gas channels that receive incoming gases. The method can include (i) rotating the top plate or the bottom plate of the shower head to a first position to allow a gas to flow through the shower head; (ii) performing a surface modification cycle that includes: applying a negative direct current (DC) bias voltage to the shower head, applying an RF power signal to the wafer chuck; and (iii) performing an etching cycle that includes: removing the negative DC bias voltage from the shower head and lowering the RF power signal applied to the wafer chuck.

Abstract: A method includes mounting a wafer on a chuck disposed within a chamber of an etching system, the wafer being encircled by a focus ring. While etching portions of the wafer, an etch direction is adjusted to a first desired etch direction by adjusting a vertical position of the focus ring relative to the wafer to a first desired vertical position. While etching portions of the wafer, the etch direction is adjusted to a second desired etch direction by adjusting the vertical position of the focus ring relative to the wafer to a second desired vertical position. The second desired vertical position is different from the first desired vertical position. The second desired etch direction is different from the first desired etch direction.

Abstract: Methods to form low-k dielectric materials for use as intermetal dielectrics in multilevel interconnect systems, along with their chemical and physical properties, are provided. The deposition techniques described include PECVD, PEALD, and ALD processes where the precursors such as TEOS and MDEOS may provide the requisite O-atoms and O2 gas may not be used as one of the reactants. The deposition techniques described further include PECVD, PEALD, and ALD processes where O2 gas may be used and, along with the O2 gas, precursors containing embedded Si—O—Si bonds, such as (CH3O)3—Si—O—Si—(CH3O)3) and (CH3)3—Si—O—Si—(CH3)3 may be used.

Abstract: The present disclosure describes an exemplary etch process in a reactor that includes a shower head and an electrostatic chuck configured to receive a radio frequency (RF) power. The shower head includes a top plate and a bottom plate with one or more gas channels that receive incoming gases. The method can include (i) rotating the top plate or the bottom plate of the shower head to a first position to allow a gas to flow through the shower head; (ii) performing a surface modification cycle that includes: applying a negative direct current (DC) bias voltage to the shower head, applying an RF power signal to the wafer chuck; and (iii) performing an etching cycle that includes: removing the negative DC bias voltage from the shower head and lowering the RF power signal applied to the wafer chuck.

Abstract: A method includes mounting a wafer on a chuck disposed within a chamber of an etching system, the wafer being encircled by a focus ring. While etching portions of the wafer, an etch direction is adjusted to a first desired etch direction by adjusting a vertical position of the focus ring relative to the wafer to a first desired vertical position. While etching portions of the wafer, the etch direction is adjusted to a second desired etch direction by adjusting the vertical position of the focus ring relative to the wafer to a second desired vertical position. The second desired vertical position is different from the first desired vertical position. The second desired etch direction is different from the first desired etch direction.

Abstract: A method includes mounting a wafer on a chuck disposed within a chamber of an etching system, the wafer being encircled by a focus ring. While etching portions of the wafer, an etch direction is adjusted to a first desired etch direction by adjusting a vertical position of the focus ring relative to the wafer to a first desired vertical position. While etching portions of the wafer, the etch direction is adjusted to a second desired etch direction by adjusting the vertical position of the focus ring relative to the wafer to a second desired vertical position. The second desired vertical position is different from the first desired vertical position. The second desired etch direction is different from the first desired etch direction.

Abstract: The present disclosure describes an exemplary etch process in a reactor that includes a shower head and an electrostatic chuck configured to receive a radio frequency (RF) power. The shower head includes a top plate and a bottom plate with one or more gas channels that receive incoming gases. The method can include (i) rotating the top plate or the bottom plate of the shower head to a first position to allow a gas to flow through the shower head; (ii) performing a surface modification cycle that includes: applying a negative direct current (DC) bias voltage to the shower head, applying an RF power signal to the wafer chuck; and (iii) performing an etching cycle that includes: removing the negative DC bias voltage from the shower head and lowering the RF power signal applied to the wafer chuck.