Patents by Inventor Yu-Lung Huang
Yu-Lung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150906Abstract: An electrolytic cell includes a cation exchange membrane, a cathode compartment, and an anode compartment. The cathode compartment includes a gas diffusion electrode and a flow channel element, in which the flow channel element is between the cation exchange membrane and the gas diffusion electrode, and has a plurality of flow channels arranged in parallel with each other. The anode compartment includes an anode mesh, in which the cation exchange membrane is between the anode mesh and the flow channel element. A distance between the anode mesh and the gas diffusion electrode is substantially equal to the sum of a first thickness of the cation exchange membrane and a second thickness of the flow channel element. The novel electrolytic cell can combine with a chloralkali electrolytic cell to deal with gaseous CO2 and produce products, e.g., synthesis gas, for other purposes.Type: ApplicationFiled: May 9, 2023Publication date: May 9, 2024Inventors: Hao-Ming CHEN, Tai-Lung CHEN, Wan-Tun HUNG, Yu-Cheng CHEN, Kuo-Ming HUANG, Fu-Da YEN, Che-Jui LIAO
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Patent number: 11972957Abstract: A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.Type: GrantFiled: July 31, 2020Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-chun Yang, Chih-Lung Cheng, Yi-Ming Lin, Po-Chih Huang, Yu-Hsiang Juan, Xuan-Yang Zheng
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Publication number: 20240136263Abstract: An electronic package is provided, in which a first electronic module and a second electronic module are stacked via a plurality of first conductive structures and a plurality of second conductive structures, and the amount of solder of the first conductive structures is greater than the amount of solder of the second conductive structures, such that the electronic package can be configured with the first conductive structures and the second conductive structures according to the degree of warpage of the electronic package, so as to effectively disperse the stress to avoid the problem of warpage.Type: ApplicationFiled: December 12, 2022Publication date: April 25, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Hung-Kai WANG, Yih-Jenn JIANG, Don-Son JIANG, Yu-Lung HUANG, Men-Yeh CHIANG
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Publication number: 20240085398Abstract: A semiconductor device includes a circuit layer and a nanopore layer. The nanopore layer is formed on the circuit layer and is formed with a pore therethrough. The circuit layer includes a circuit unit configured to drive a biomolecule through the pore and to detect a current associated with a resistance of the nanopore layer, whereby a characteristic of the biomolecule can be determined using the currents detected by the circuit unit.Type: ApplicationFiled: November 21, 2023Publication date: March 14, 2024Inventors: Kun-Lung Chen, Tung-Tsun Chen, Cheng-Hsiang Hsieh, Yu-Jie Huang, Jui-Cheng Huang
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Patent number: 11915957Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.Type: GrantFiled: January 7, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
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Publication number: 20240038670Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.Type: ApplicationFiled: October 4, 2023Publication date: February 1, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Patent number: 11881459Abstract: An electronic package is provided and includes a plurality of electronic elements, a spacing structure connecting each of the plurality of electronic elements, and a plurality of conductive elements electrically connected to the plurality of electronic elements and serving as external contacts. The spacing structure has a recess to enhance the flexibility of the electronic elements after the electronic elements are connected to one another, thereby preventing the problem of warpage. A method for fabricating the electronic package is also provided.Type: GrantFiled: May 6, 2020Date of Patent: January 23, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chee-Key Chung, Yuan-Hung Hsu, Chi-Jen Chen
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Publication number: 20230381996Abstract: An ultrasonic device is provided and includes an action member, a driving member and a rotating shaft connected to the driving member. The action member provides ultrasonic vibration and vibrates the driving member, so that the driving member oscillates to make the rotating shaft and a cutter oscillate in the same direction together, so the cutter can remove scrap by oscillating during the cutting operation.Type: ApplicationFiled: July 13, 2022Publication date: November 30, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Hui Huang, Cheng-Ying Hsieh, Sin-Cyuan Lin, Men-Yeh Chiang, Chao-Lin Chang, Ting-Hsu Lu
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Patent number: 11810862Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.Type: GrantFiled: November 1, 2022Date of Patent: November 7, 2023Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Patent number: 11792938Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.Type: GrantFiled: November 2, 2020Date of Patent: October 17, 2023Assignee: Silicon Precision Industries Co., Ltd.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Publication number: 20230210149Abstract: A method for preparing a fermented food by using a Rhizopus microsporus strain is provided. The method includes the following steps: providing an isolated and purified Rhizopus microsporus strain, and its deposit number is DSM 34400; and inoculating the isolated and purified Rhizopus microsporus strain to a substrate for fermentation to form a fermented food. The substrate includes a legume, a processing residue of a legume, or a combination thereof.Type: ApplicationFiled: December 7, 2022Publication date: July 6, 2023Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chun-Shen CHENG, Chih-Hsuan FAN, Shu-Hsien TSAI, Chuan-Chi CHIEN, Shih-Chi LEE, Hsiang Tsai CHENG, Yu Lung HUANG
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Patent number: 11605554Abstract: A flip-chip process is to provide a pressing jig with a channel, so that the pressing jig grips a chip module by vacuum suction through the channel, and the chip module can be bonded onto a circuit board via a plurality of solder bumps through the pressing jig, and then a heating device is provided to heat the plurality of solder bumps and reflow the plurality of solder bumps. Therefore, the chip module can be vacuum-gripped by the pressing jig to suppress deformation of the chip module, so that the solder bumps can effectively connect to corresponding contacts of the circuit board.Type: GrantFiled: August 3, 2021Date of Patent: March 14, 2023Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Publication number: 20230053125Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.Type: ApplicationFiled: November 1, 2022Publication date: February 16, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Publication number: 20230014476Abstract: An electronic package, in which a heat dissipation structure is disposed on a carrier structure to form a packaging space for electronic components to be accommodated in the packaging space, and the electronic components are completely encapsulated by a heat dissipation material to prevent the electronic components exposing from the heat dissipation material so as to improve the heat dissipation effect.Type: ApplicationFiled: June 27, 2022Publication date: January 19, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Publication number: 20220406642Abstract: A flip-chip process is to provide a pressing jig with a channel, so that the pressing jig grips a chip module by vacuum suction through the channel, and the chip module can be bonded onto a circuit board via a plurality of solder bumps through the pressing jig, and then a heating device is provided to heat the plurality of solder bumps and reflow the plurality of solder bumps. Therefore, the chip module can be vacuum-gripped by the pressing jig to suppress deformation of the chip module, so that the solder bumps can effectively connect to corresponding contacts of the circuit board.Type: ApplicationFiled: August 3, 2021Publication date: December 22, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Publication number: 20220399245Abstract: Provided is an electronic package, in which a heat dissipating body is formed on an electronic device and is combined with a heat sink so that the electronic device, the heat dissipating body and the heat sink form a receiving space, and a heat dissipating material is formed in the receiving space and in contact with the heat sink and the electronic device, where a fluid regulating space is formed between the heat dissipating material and the heat dissipating body and is used as a volume regulating space for the heat dissipating material during thermal expansion and contraction.Type: ApplicationFiled: July 8, 2021Publication date: December 15, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Patent number: 11521930Abstract: An electronic package is provided, in which a circuit board and a circuit block are embedded in an encapsulating layer at a distance to each other, and circuit structures are formed on the two opposite surfaces of the encapsulating layer with electronic components arranged on one of the circuit structures. The circuit block and the circuit board embedded in the encapsulating layer are spaced apart from each other to allow to separate current conduction paths. As such, the circuit board will not overheat, and issues associated with warpage of the circuit board can be eliminated. Moreover, by embedding the circuit block and the circuit board in the encapsulating layer at a distance to each other, the structural strength of the encapsulating layer can be improved.Type: GrantFiled: October 13, 2020Date of Patent: December 6, 2022Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chih-Ming Huang, Kuo-Hua Yu, Chang-Fu Lin
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Publication number: 20220375813Abstract: A heat dissipation structure is provided and includes a heat dissipation body and an adjustment channel. A carrying area and an active area adjacent to the carrying area are defined on a surface of the heat dissipation body, the carrying area is used for applying a first heat dissipation material thereonto, and the adjustment channel is formed in the active area, where one end of the adjustment channel communicates with the outside of the heat dissipation structure, and the other end communicates with the carrying area. Therefore, when the heat dissipation body is coupled to the electronic component by the first heat dissipation material, the adjustment channel can adjust a volume of the first heat dissipation material.Type: ApplicationFiled: January 25, 2022Publication date: November 24, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Kuo-Hua Yu, Chang-Fu Lin
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Patent number: 11482470Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.Type: GrantFiled: May 12, 2020Date of Patent: October 25, 2022Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
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Publication number: 20220336323Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu