Patents by Inventor Yu-Min Houng

Yu-Min Houng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10658998
    Abstract: A method for forming an acoustic resonator comprising: forming a piezoelectric material on a first substrate; and applying the piezoelectric material to a second substrate on which the acoustic resonator is fabricated upon.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: May 19, 2020
    Assignee: OEPIC SEMICONDUCTORS, INC.
    Inventors: Majid Riaziat, Yu-Min Houng
  • Patent number: 9559231
    Abstract: Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For some embodiments, a collar material is formed that laterally surrounds and is in contact with the PV nanowires along a portion of one or more of their ends. According to some embodiments, the PV nanowires are formed on a crystalline silicon substrate. According to some other embodiments, the PV nanowires are formed on a roll-sourced continuous substrate.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: January 31, 2017
    Inventors: Shih-Ping Wang, Yu-Min Houng, Nobuhiko Kobayashi
  • Patent number: 9059344
    Abstract: Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For one preferred embodiment, a canopy-style tip-side electrode layer contacts the tip ends of the PV nanowires and is separated from the substrate surface layer by an air gap layer, the PV nanowires being disposed within the air gap layer. For another preferred embodiment, a tip-side electrode layer is disposed upon a layer of optically transparent, electrically insulating solid filler material that laterally surrounds the PV nanowires along a portion of their lengths, wherein an air gap is disposed between the solid filler layer and the substrate surface layer. Methods for fabricating the nanowire-based photovoltaic energy conversion devices are also described.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: June 16, 2015
    Inventors: Shih-Ping Wang, Nobuhiko Kobayashi, Yu-Min Houng
  • Publication number: 20150033520
    Abstract: A method for forming an acoustic resonator comprising: forming a piezoelectric material on a first substrate; and applying the piezoelectric material to a second substrate on which the acoustic resonator is fabricated upon.
    Type: Application
    Filed: July 29, 2014
    Publication date: February 5, 2015
    Inventors: MAJID RIAZIAT, YU-MIN HOUNG
  • Publication number: 20140034120
    Abstract: Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For some embodiments, a collar material is formed that laterally surrounds and is in contact with the PV nanowires along a portion of one or more of their ends. According to some embodiments, the PV nanowires are formed on a crystalline silicon substrate. According to some other embodiments, the PV nanowires are formed on a roll-sourced continuous substrate.
    Type: Application
    Filed: September 9, 2011
    Publication date: February 6, 2014
    Inventors: Shih-Ping Wang, Yu-Min Houng, Nobuhiko Kobayashi
  • Publication number: 20130068286
    Abstract: Nanowire-based photovoltaic energy conversion devices and related fabrication methods therefor are described. A plurality of photovoltaic (PV) nanowires extend outwardly from a surface layer of a substrate, each PV nanowire having a root end near the substrate surface layer and a tip end opposite the root end. For one preferred embodiment, a canopy-style tip-side electrode layer contacts the tip ends of the PV nanowires and is separated from the substrate surface layer by an air gap layer, the PV nanowires being disposed within the air gap layer. For another preferred embodiment, a tip-side electrode layer is disposed upon a layer of optically transparent, electrically insulating solid filler material that laterally surrounds the PV nanowires along a portion of their lengths, wherein an air gap is disposed between the solid filler layer and the substrate surface layer. Methods for fabricating the nanowire-based photovoltaic energy conversion devices are also described.
    Type: Application
    Filed: August 23, 2010
    Publication date: March 21, 2013
    Inventors: Shih-Ping Wang, Nobuhiko Kobayashi, Yu-Min Houng
  • Patent number: 6696710
    Abstract: A heterojunction bipolar transistor (HBT) having a base-emitter junction that exhibits the desirable properties of a GaAsSb/AlInAs interface, but which includes an intermediate layer in the emitter such that the intermediate layer contacts the GaAsSb base and the AlInAs emitter. The intermediate layer is sufficiently thin to be substantially electrically transparent, but sufficiently thick to provide a surface over which to grow the AlInAs emitter. The intermediate layer may be of a material such as InP, which has a bulk lattice constant that matches the lattice constant of the GaAsSb base and the AlInAs emitter. Alternatively, the intermediate layer may be of a material having a lattice constant different than that of the GaAsSb base and the AlInAs emitter, but may be pseudomorphically grown so as to provide an apparent lattice-match to the GaAsSb base and the AlInAs emitter.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: February 24, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Nicolas J. Moll, Yu-Min Houng
  • Patent number: 6586113
    Abstract: Systems and methods of manufacturing etchable heterojunction interfaces and etched heterojunction structures are described. A bottom layer is deposited on a substrate, a transition etch layer is deposited over the bottom layer, and a top layer is deposited over the transition etch layer. The transition etch layer substantially prevents the bottom layer and the top layer from forming a material characterized by a composition substantially different than the bottom layer and a substantially non-selective etchability with respect to the bottom layer. By tailoring the structure of the heterojunction interface to respond to heterojunction etching processes with greater predictability and control, the transition etch layer enhances the robustness of previously unreliable heterojunction device manufacturing processes. The transition etch layer enables one or more vias to be etched down to the top surface of the bottom layer in a reliable and repeatable manner.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: July 1, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Sandeep R. Bahl, Yu-Min Houng, Virginia M. Robbins, Fred Sugihwo
  • Publication number: 20020131462
    Abstract: A vertical cavity surface-emitting laser, and method of fabricating such a laser, for use in an optical communication system including an optical cavity arranged between a pair of distributed Bragg reflectors, an active region in the optical cavity, and an oxidized current confinement layer arranged on one side of the active layer. The current confinement layer includes a component, such as antimony, that is segregated into a conductive layer on one side of the current confinement layer during oxidation.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 19, 2002
    Inventors: Chao-Kun Lin, Scott W. Corzine, Michael R.T. Tan, Yu-Min Houng
  • Publication number: 20020117657
    Abstract: A heterojunction bipolar transistor (BBT) having a base-emitter junction that exhibits the desirable properties of a GaAsSb/AlInAs interface, but which includes an intermediate layer in the emitter such that the intermediate layer contacts the GaAsSb base and the AlInAs emitter. The intermediate layer is sufficiently thin to be substantially electrically transparent, but sufficiently thick to provide a surface over which to grow the AlInAs emitter. The intermediate layer may be of a material such as InP, which has a bulk lattice constant that matches the lattice constant of the GaAsSb base and the AlInAs emitter. Alternatively, the intermediate layer may be of a material having a lattice constant different than that of the GaAsSb base and the AlInAs emitter, but may be pseudomorphically grown so as to provide an apparent lattice-match to the GaAsSb base and the AlInAs emitter.
    Type: Application
    Filed: February 27, 2001
    Publication date: August 29, 2002
    Inventors: Nicolas J. Moll, Yu-Min Houng
  • Patent number: 5892787
    Abstract: A substantially n-type substrate structure having a p-type surface for use in semiconductor devices as a substitute for a p-type semiconductor substrate. The substrate structure comprises a substrate region and a buffer region. The substrate region is a region of n-type compound semiconductor, and includes a degeneratively n-doped portion adjacent its first surface. The buffer region is a region of compound semiconductor doped with a p-type dopant. The buffer region is located on the first surface of the substrate region and includes a surface remote from the substrate region that provides the p-type surface of the substrate structure. The buffer region also includes a degeneratively p-doped portion adjacent the degeneratively n-doped portion of the substrate region. The substrate structure includes a tunnel junction between the degeneratively n-doped portion of the substrate region and the degeneratively p-doped portion of the buffer region.
    Type: Grant
    Filed: April 22, 1996
    Date of Patent: April 6, 1999
    Assignee: Hewlett-Packard Company
    Inventors: Michael R. T. Tan, Albert T. Yuen, Shih-Yuan Wang, Ghulam Hasnain, Yu-Min Houng
  • Patent number: 5596595
    Abstract: A surface-emitting laser includes optically transparent layers on a side of a DBR mirror structure that is opposite to an optical cavity of the laser. In one embodiment, the transparent layer is a heat-conducting layer that has an efficient heat transfer relationship with an opening in a top electrode and with a heat-spreading layer. The heat-spreading layer increases the diameter of the electrode, so as to reduce the thermal impedance of the surface-emitting laser. The heat-spreading layer may be annular in shape and may have an inside diameter that is less than the outside diameter of the electrode, allowing the heat-spreading layer to first overlap the electrode and then overlap the portion of the heat-conducting layer that resides on the inside portion of the electrode. In another embodiment, the optically transparent layer is positioned between the top electrode and the top DBR mirror structure of the surface-emitting laser.
    Type: Grant
    Filed: June 8, 1995
    Date of Patent: January 21, 1997
    Assignee: Hewlett-Packard Company
    Inventors: Michael R. T. Tan, Yu-Min Houng, Shih-Yuan Wang