Patents by Inventor Yu Sheng

Yu Sheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240181180
    Abstract: The present disclosure is directed to an integrated device for inhalation medication and peak flow measurement and method of using the same. The integrated device integrates a respiratory flow rate measurement unit and a wireless communication module into the inhaler device, so that the inhaler device has both a medication function and a respiratory flow rate measurement function, and the integrated device is capable of transmitting the measured respiratory flow data to an electronic device by wireless transmission, so as to construct a personalized health assessment model, which can be used as a reference for medical personnel to make treatment decisions.
    Type: Application
    Filed: February 20, 2023
    Publication date: June 6, 2024
    Inventors: Shu-Hui Hung, Yu-Lu Hsiao, Chih-Sheng Yu
  • Publication number: 20240186724
    Abstract: An antenna module includes an antenna box and a first connection wire. The antenna box can include a first antenna, a second antenna, a first connection terminal, a second connection terminal and a housing. The first and second antennas are located in the housing and the housing has a first opening collectively exposing a portion of the first connection terminal and a portion of the second connection terminal. Each of the first and second antennas is adapted to receive or transmit wireless signals according to one of a plurality of wireless communication standards and the first and second antennas are electrically connected to the first and second connection terminals, respectively. The wireless communication standards can be different from each other.
    Type: Application
    Filed: November 6, 2023
    Publication date: June 6, 2024
    Inventors: Tsai-Yi Yang, Yung-Sheng Tseng, Bo-Yuan Chang, Sheng-Shen Chang, Yu-Hua Chen, Shih-Shih Chien, En-Chin Wei
  • Publication number: 20240186417
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes first nanostructures and second nanostructures formed over a substrate, and a first gate structure formed over the first nanostructures. The semiconductor device structure includes a second gate structure formed over the second nanostructures, and the second gate structure includes a gate dielectric layer, a first type work function layer and a filling layer. The semiconductor device structure includes a first isolation layer between the first gate structure and the second gate structure, and the first isolation layer includes a first sidewall surface, and the first sidewall surface is in direct contact with a first interface between the gate dielectric layer and the first type work function layer and a second interface between the work function layer and the filling layer.
    Type: Application
    Filed: February 15, 2024
    Publication date: June 6, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chao LIN, Wei-Sheng YUN, Tung-Ying LEE
  • Publication number: 20240186952
    Abstract: An amplifying circuit includes a first transistor, a second transistor, and a switching circuit. A control terminal of the first transistor is coupled to an input terminal of the amplifying circuit, and a first terminal of the first transistor is coupled to a first reference end. The input terminal of the amplifying circuit receives a first radio frequency (RF) signal. A first terminal of the second transistor is coupled to a second terminal of the first transistor, and a second terminal of the second transistor is coupled to an output terminal of the amplifying circuit. The output terminal of the amplifying circuit outputs an amplified signal. The first transistor amplifies the first RF signal to generate a second RF signal. The switching circuit performs a switching operation to transmit the second RF signal to one of the first terminal and the control terminal of the second transistor.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 6, 2024
    Applicant: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Yu-Hsuan Chao
  • Patent number: 12001384
    Abstract: A processing element array includes N processing elements (PE) arranged linearly, N?2, and an operating method of the PE array includes: performing a first data transmission procedure, where an initial value of I is 1 and the first data transmission procedure includes: operating, by an ith PE, according to a first datum stored in itself, and sending the first datum to other PEs for their operations, adding 1 to I when I<N, and performing the first data transmission procedure again, performing a second data transmission procedure when I is equal to N, which includes: operating, by the Jth PE, according to a second datum stored in itself, and sending the second datum to other PEs for their operations, reducing J by 1 when J>1 and the (J?1)th PE has the second datum, and performing the second data transmission procedure again.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: June 4, 2024
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Yu-Sheng Lin, Trista Pei-Chun Chen, Wei-Chao Chen
  • Patent number: 12004431
    Abstract: A semiconductor device includes a bottom electrode; a magnetic tunneling junction (MTJ) element over the bottom electrode; a top electrode over the MTJ element; and a sidewall spacer abutting the MTJ element, wherein at least one of the bottom electrode, the top electrode, and the sidewall spacer includes a magnetic material.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Chieh Hsiao, Po-Sheng Lu, Wei-Chih Wen, Liang-Wei Wang, Yu-Jen Wang, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20240178128
    Abstract: A semiconductor device structure includes a first dielectric wall, a plurality of first semiconductor layers vertically stacked and extending outwardly from a first side of the first dielectric wall, a plurality of second semiconductor layers vertically stacked and extending outwardly from a second side of the first dielectric wall. The structure also includes a first gate electrode layer surrounding at least three surfaces of each of the first semiconductor layers, the first gate electrode layer having a first conductivity type, and a second gate electrode layer surrounding at least three surfaces of each of the second semiconductor layers, the second gate electrode layer having a second conductivity type opposite the first conductivity type. The structure further includes a gate bridge contact disposed on the first dielectric wall, and a gate via contact disposed on the gate bridge contact.
    Type: Application
    Filed: January 22, 2023
    Publication date: May 30, 2024
    Inventors: Hong-Chih CHEN, Chun-Sheng LIANG, Yu-San CHIEN, Wei-Chih KAO
  • Publication number: 20240177503
    Abstract: The present invention discloses a port district sea line multiple vessel monitoring system and operating method thereof. Specifically, the port district sea line multiple vessel monitoring system comprises a processing module, a storage module, a camera and a floating object information receiving module. The port district sea line multiple vessel monitoring system may automatically recognize image classification of water surface object, therefore to determine operation of patrol mode, monitor mode or auxiliary recognizing mode for satisfying the needs of monitoring of port district sea line.
    Type: Application
    Filed: November 25, 2023
    Publication date: May 30, 2024
    Inventors: YU-TING PENG, YAN-SHENG SONG, CHIA-YU WU, CHIEN-HUNG LIU
  • Patent number: 11997480
    Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The first member device transmits a device information of the first member device to the Bluetooth host device. The Bluetooth host device controls a display device to display a candidate device list, and to display a single device item in the candidate device list to represent the Bluetooth device set, but does not simultaneously display two device items in the candidate device list to represent the first member device and the second member device. The Bluetooth host device further establishes a connection with the first member device to conduct pairing procedure to generate a first cypher key after receiving a selection command. The first member device further establishes a connection with the Bluetooth host device to conduct pairing procedure to generate a second cypher key.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: May 28, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yu Hsuan Liu, Yung Chieh Lin, Po Sheng Chiu
  • Patent number: 11993025
    Abstract: A fixing assembly for mounting UV lamps includes a base, a first gear and a plurality of mounting modules. The first gear is arranged on one side of the base; the mounting modules are arranged around the first gear. The mounting module includes a first driving assembly, a second driving assembly and a support frame. The first driving assembly is used to drive the second driving assembly and the support frame to move circumferentially around the first gear in a considerably horizontal plane, and the second driving component is used to drive the support to move back in a considerably vertical direction. The support frame is used for mounting UV lamp. The flexibility of the fixing assembly is improved. The UV lamp may comprehensively irradiate and cure the photosensitive adhesive.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: May 28, 2024
    Assignee: TRIPLE WIN TECHNOLOGY(SHENZHEN) CO.LTD.
    Inventors: Yen-Sheng Lin, Yu-Wen Chen
  • Publication number: 20240166124
    Abstract: A light emitting device emitting an output light includes a light adjustment structure. A sub light is defined as the output light corresponding to an azimuth angle, a first value L1 is a sum of a luminance of the sub light corresponding to a polar angle from 115 to 125 degrees, a second value L2 is a sum of a luminance of the sub light corresponding to a polar angle from 95 to 105 degrees, a third value L3 is a sum of a luminance of the sub light corresponding to a polar angle from 75 to 85 degrees, a fourth value L4 is a sum of a luminance of the sub light corresponding to a polar angle from 55 to 65 degrees. The first value L1, the second value L2, the third value L3 and the fourth value L4 satisfy L3<L2, and 1.23?(L1*L3)/(L2*L4)?2.92.
    Type: Application
    Filed: October 22, 2023
    Publication date: May 23, 2024
    Applicant: InnoLux Corporation
    Inventors: Yu-Chia HUANG, Hong-Sheng HSIEH, Tsung-Han TSAI
  • Publication number: 20240170888
    Abstract: An electrical connection device includes a plug connector. The plug connector includes a conductive body, an outer conductor, an insulative body and a central terminal. The outer conductor has a rear end, a front latching portion and an elastic piece. The rear end electrically connects the conductive body, the front latching portion is opposite to the rear end and is positioned in front of the rear end, the elastic piece is positioned between the rear end and the front latching portion and connects the front latching portion. At least one of the conductive body and the outer conductor is formed with a stopping surface, a position of the stopping surface correspond to the elastic piece of the outer conductor and is close to the front latching portion. The electrical connection device assures and avoids interruption of power and signal transfer.
    Type: Application
    Filed: November 22, 2023
    Publication date: May 23, 2024
    Inventor: Yu-Sheng Su
  • Patent number: 11990418
    Abstract: A method for forming a chip package structure is provided. The method includes removing a first portion of a substrate to form a first recess in the substrate. The method includes forming a buffer structure in the first recess. A first Young's modulus of the buffer structure is less than a second Young's modulus of the substrate. The method includes forming a first wiring structure over the buffer structure and the substrate. The method includes bonding a chip package to the first wiring structure. The chip package has an interposer substrate and a chip structure over the interposer substrate, and a first corner of the interposer substrate and a second corner of the chip structure overlap the buffer structure in a top view of the chip package and the buffer structure.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Hua Wang, Po-Chen Lai, Ping-Tai Chen, Che-Chia Yang, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng
  • Patent number: 11991517
    Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The first member device transmits a device information of the first member device to the Bluetooth host device. The Bluetooth host device controls a display device to display a candidate device list, and to display a single device item in the candidate device list to represent the Bluetooth device set, but does not simultaneously display two device items in the candidate device list to represent the first member device and the second member device. The Bluetooth host device further establishes a connection with the first member device to conduct pairing procedure to generate a first cypher key after receiving a selection command. The first member device further establishes a connection with the Bluetooth host device to conduct pairing procedure to generate a second cypher key.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: May 21, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yu Hsuan Liu, Yung Chieh Lin, Po Sheng Chiu
  • Patent number: 11990182
    Abstract: An operation method for a memory device is provided. The memory device includes a two-terminal selector and a resistance variable storage element coupled to the two-terminal selector. The method includes providing a voltage pulse to the memory device. A voltage applied across the two-terminal selector during a falling part of the voltage pulse falls below a holding voltage of the two-terminal selector. A voltage falling rate of the falling part at which the voltage applied across the two-terminal selector reaches the holding voltage is raised for reducing threshold voltage drift of the two-terminal selector.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hengyuan Lee, Cheng-Hsien Wu, Yu-Sheng Chen, Elia Ambrosi, Chien-Min Lee, Xinyu Bao
  • Publication number: 20240158309
    Abstract: The invention provides a material surface treatment equipment, which is applied to a material substrate. The material surface treatment equipment includes a surface treatment device and at least one waveguide device. The surface treatment device is used to carry the material substrate to perform a surface treatment process. Each waveguide device is used for introducing electromagnetic waves to the material substrate to assist in performing the surface treatment process. Through the introduction of electromagnetic waves, the surface treatment process of the material substrate is easy to perform and can achieve the strengthening effect.
    Type: Application
    Filed: December 15, 2022
    Publication date: May 16, 2024
    Inventors: TIEN-HSI LEE, JUN-HUANG WU, YU-SHENG CHIOU, SHU-CHENG LI, WEI-CHI HUANG, HSIN CHEN
  • Patent number: 11983848
    Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: May 14, 2024
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Lung Jen, Pei-Kuei Tsung, Chih-Wei Chen, Yao-Sheng Wang, Shih-Che Chen, Yu-Sheng Lin, Chih-Wen Goo, Shih-Chin Lin, Tsung-Shian Huang, Ying-Chieh Chen
  • Patent number: 11984378
    Abstract: A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Chin-Hua Wang, Yu-Sheng Lin, Shin-Puu Jeng
  • Patent number: D1026816
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 14, 2024
    Assignee: VOLTRONIC POWER TECHNOLOGY CORP.
    Inventors: You-Sheng Chiang, Yu-Cheng Lu, Juor-Ming Hsieh
  • Patent number: D1027976
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: May 21, 2024
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung