Patents by Inventor Yu-Shin Wang

Yu-Shin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972974
    Abstract: An IC structure includes a transistor, a source/drain contact, a metal oxide layer, a non-metal oxide layer, a barrier structure, and a via. The transistor includes a gate structure and source/drain regions on opposite sides of the gate structure. The source/drain contact is over one of the source/drain regions. The metal oxide layer is over the source/drain contact. The non-metal oxide layer is over the metal oxide layer. The barrier structure is over the source/drain contact. The barrier structure forms a first interface with the metal oxide layer and a second interface with the non-metal oxide layer, and the second interface is laterally offset from the first interface. The via extends through the non-metal oxide layer to the barrier structure.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal Abhijith Khaderbad, Keng-Chu Lin
  • Publication number: 20240088041
    Abstract: The present disclosure provides a semiconductor structure, including a substrate, a gate structure over the substrate, including a work function layer over the substrate, a dielectric layer at least partially surrounding the gate structure, and a capping layer over the gate structure, wherein a bottom of the capping layer includes at least one protrusion protruding toward the substrate.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Inventors: TSENG-CHIEH PAN, YU-HSIANG WANG, CHI-SHIN WANG, FAN-YI HSU
  • Publication number: 20240079315
    Abstract: Improved control of via anchor profiles in metals at a contact layer can be achieved by slowing down an anchor etching process and by introducing a passivation operation. By first passivating a metallic surface, etchants can be prevented from dispersing along grain boundaries, thereby distorting the shape of the via anchor. An iterative scheme that involves multiple cycles of alternating passivation and etching operations can control the formation of optimal via anchor profiles. When a desirable anchor shape is achieved, the anchor maintains structural integrity of the vias, thereby improving reliability of the interconnect structure.
    Type: Application
    Filed: September 1, 2022
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Shin WANG, Yu-Hsiang Wang, Wei-Ting Chang, Fan-Yi Hsu
  • Patent number: 9832459
    Abstract: An output circuit includes a level adjustment circuit and a determination circuit. The output circuit is employed for generating an output to an output terminal of the output circuit, where the output terminal is coupled to a connecting port. The level adjustment circuit is coupled to the output terminal and is employed for generating at least one adjusted signal according to a first voltage signal at the output terminal in a first period and a second voltage signal at the output terminal in a second period. The determination circuit is coupled to the level adjustment circuit and is employed for generating a determination signal according to the at least one adjusted signal, wherein the determination signal indicates whether a load is connected to the connecting port.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: November 28, 2017
    Assignee: ALI Corporation
    Inventors: Chih-Yuan Hsu, Yu-Shin Wang
  • Patent number: 9510733
    Abstract: An endoscope and a method for chemical modification of the members thereof are provided, on one hand, a transparent isolation film is utilized such that the tissue fluid inside a subject cannot stick to a lens of the endoscope to maintain the optimal image capturing status of the lens of the endoscope without the need to extract the endoscope frequently from the body of the subject, such that not only the time consumed in the examination process may be reduced, but also the uncomfortable feeling of the subject in the examination process may be decreased; on the other hand, a chemical modification method for members of the endoscope is provided to reduce the negative impact on the lens of the endoscope resulted from liquid pollutant or mist, moisture.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: December 6, 2016
    Assignee: NATIONAL TAIWAN UNIVERSITY
    Inventors: Men-Luh Yen, Tai-Horng Young, Hsu-Hsien Chang, Yu-Shin Wang
  • Publication number: 20160301927
    Abstract: An output circuit includes a level adjustment circuit and a determination circuit. The output circuit is employed for generating an output to an output terminal of the output circuit, where the output terminal is coupled to a connecting port. The level adjustment circuit is coupled to the output terminal and is employed for generating at least one adjusted signal according to a first voltage signal at the output terminal in a first period and a second voltage signal at the output terminal in a second period. The determination circuit is coupled to the level adjustment circuit and is employed for generating a determination signal according to the at least one adjusted signal, wherein the determination signal indicates whether a load is connected to the connecting port.
    Type: Application
    Filed: November 3, 2015
    Publication date: October 13, 2016
    Inventors: Chih-Yuan Hsu, Yu-Shin Wang
  • Publication number: 20150070508
    Abstract: Described in example embodiments herein are techniques for detecting a connection between a load and a connecting port. In accordance with an example embodiment, an output circuit is able to detect a corresponding connecting port includes a voltage output stage, a reference current source and a determination circuit. The voltage output stage is arranged to output a voltage signal to an output end of the output circuit. The reference current source is arranged to selectively provide a first current to the output end. The determination circuit is arranged to generate a determination signal according to whether a second voltage signal is identical to a first voltage signal that is caused by the first current flowing into the output end. The determination signal indicates the load is connected to the connecting port when the second voltage signal is not identical to the first voltage signal.
    Type: Application
    Filed: January 15, 2014
    Publication date: March 12, 2015
    Applicant: ALI CORPORATION
    Inventors: Chih-Yuan Hsu, Yu-Shin Wang
  • Publication number: 20140371528
    Abstract: An endoscope and a method for chemical modification of the members thereof are provided, on one hand, a transparent isolation film is utilized such that the tissue fluid inside a subject cannot stick to a lens of the endoscope to maintain the optimal image capturing status of the lens of the endoscope without the need to extract the endoscope frequently from the body of the subject, such that not only the time consumed in the examination process may be reduced, but also the uncomfortable feeling of the subject in the examination process may be decreased; on the other hand, a chemical modification method for members of the endoscope is provided to reduce the negative impact on the lens of the endoscope resulted from liquid pollutant or mist, moisture.
    Type: Application
    Filed: November 20, 2013
    Publication date: December 18, 2014
    Applicant: National Taiwan University
    Inventors: Men-Luh YEN, Tai-Homg YOUNG, Hsu-Hsien CHANG, Yu-Shin WANG
  • Publication number: 20120096209
    Abstract: A multi peripheral accelerating apparatus includes a processor device disposed on a main board, a primary memory and a controller disposed on the main board and electrically connected to the processor device for exchanging information with the processor device, a secondary memory disposed on the main board and electrically connected to the controller, and one or more peripherals disposed on the main board and electrically connected to the controller for allowing the information to be transmitted or exchanged from the peripherals to the secondary memory when the processor device is transmitting or exchanging information with the primary memory.
    Type: Application
    Filed: October 15, 2010
    Publication date: April 19, 2012
    Inventor: Yu Shin Wang
  • Publication number: 20060082517
    Abstract: An antenna has a central core with a central coupling region. At least one pair of radiating antenna lines is formed a surface of the central core in a helix structure. A circuit board has a protruding structure and is electrically coupled to the pair of radiating antenna lines. The protruding structure of the circuit board affixes into the central coupling region of the central core, and a signal input/output (I/O) end of the antenna is on the circuit board. The circuit board has a balun transformer, preferably using the LC resonators in two paths with a desired equivalent resonant length, so as to preferably produce the difference by half wavelength.
    Type: Application
    Filed: November 17, 2005
    Publication date: April 20, 2006
    Inventors: Shyh-Jong Chung, Yu-Shin Wang
  • Patent number: 7002530
    Abstract: An antenna has a central core with a central coupling region. A pair of helix antenna lines is formed a surface of the central core. A balun transformer is formed on a circuit board and electrically coupled to the pair of radiating antenna lines. Wherein, the circuit board has a protruding structure to affixing into the central coupling region of the central core. A signal input/output (I/O) end of the antenna is at another end of the balun transformer. The balun transformer preferably uses the LC resonators in two paths with a desired equivalent resonant length, so as to preferably produce the difference by half wavelength.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: February 21, 2006
    Assignee: Etop Technology Co., Ltd.
    Inventors: Shyh-Jong Chung, Yu-Shin Wang