Patents by Inventor Yu-Ting WENG

Yu-Ting WENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Patent number: 11918882
    Abstract: An interactive exercise apparatus for guiding a user to perform an exercise includes a display device and a detecting device. The display device is configured to display video imagery which shows an instructor image and at least one motion check image. The motion check image corresponds to a predetermined one of a plurality of body parts of the user, which has a motion guide track and a motion achievement evaluation. The detecting device is configured to detect displacement of the body parts. The motion guide track is displayed on a predetermined position of the video imagery with a predetermined track pattern, corresponding to a movement path of the predetermined body part when the user follows movements demonstrated by the instructor image to perform the exercise. The motion achievement evaluation indicates a matching degree determined according to the displacement of the predetermined body part detected by the detecting device.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 5, 2024
    Assignee: Johnson Health Tech Co., Ltd.
    Inventors: Hsin-Huang Chiang, Yu-Chieh Lee, Ning Chuang, Wei-Ting Weng, Cheng-Ho Yeh
  • Publication number: 20240055526
    Abstract: A semiconductor device and a method of fabricating a semiconductor device are provided herein. The semiconductor device includes a substrate; a fin structure arranged on the substrate and including a ridge portion and a bottom portion between the ridge portion and the substrate, wherein the ridge portion comprises a channel region and a fin region between the channel region and the bottom portion, a critical dimension of the bottom portion in a cross-fin direction is gradually increased toward the substrate to twice or more of a critical dimension of the channel region in the cross-fin direction; a metal gate structure disposed on the fin structure extending the cross-fin direction; and an epitaxy region disposed beside the metal gate structure in a lengthwise direction of the fin structure and connected to the fin structure.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chi LIN, Yu-Ting WENG, Chiung Wen Hsu, Chao-Cheng Chen
  • Publication number: 20220301922
    Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.
    Type: Application
    Filed: July 9, 2021
    Publication date: September 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsien-Chung HUANG, Chiung-Wen HSU, Mei-Ju KUO, Yu-Ting WENG, Yu-Chi LIN, Ting-Chung WANG, Chao-Cheng CHEN
  • Publication number: 20210257484
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: May 3, 2021
    Publication date: August 19, 2021
    Inventors: Chia-Wei CHANG, Chiung Wen HSU, Yu-Ting WENG
  • Patent number: 10998427
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: May 4, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Chang, Chiung Wen Hsu, Yu-Ting Weng
  • Publication number: 20210072301
    Abstract: An automatic test method for reliability and functionality of electronic device is provided to deploy a robotic arm to perform reliability test on a tested component. In the meantime, the test host can directly access the generic log files generated by the tested electronic device without the need of using a third-party test utility on the tested electronic device. Analysis is carried out by the test host using the log files to determine whether each test round generates functional result to the tested component so that data of the functionality can be collected.
    Type: Application
    Filed: September 16, 2019
    Publication date: March 11, 2021
    Inventors: Chin-Lin Hsieh, Yu-Ting Weng, Che-Cheng Wang, Che-Sheng Cheng
  • Publication number: 20190371922
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: August 19, 2019
    Publication date: December 5, 2019
    Inventors: Chia-Wei CHANG, Chiung Wen HSU, Yu-Ting WENG
  • Publication number: 20190321869
    Abstract: An apparatus for cleaning a glass sheet is provided. The apparatus includes a brushing device including a head and a plurality of bristles, each bristle having a first end attached to the head and a second end opposing the first end. The second ends contact an edge of the glass sheet during cleaning of the glass sheet. Methods for cleaning glass sheets are also provided.
    Type: Application
    Filed: November 8, 2017
    Publication date: October 24, 2019
    Applicant: CORNING INCORPORATED
    Inventors: Hsueh-Hung Fu, Jun Yuan Hou, Shin-I Huang, Sheng-Hung Liu, Yuyin Tang, Yu-Ting Weng
  • Patent number: 10388763
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: August 20, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Chang, Chiung Wen Hsu, Yu-Ting Weng
  • Publication number: 20180175173
    Abstract: A semiconductor device includes a substrate, a fin structure protruding from the substrate, a gate insulating layer covering a channel region formed of the fin structure, a gate electrode layer covering the gate insulating layer, and isolation layers disposed on opposite sides of the fin structure. The fin structure includes a bottom portion, a neck portion, and a top portion sequentially disposed on the substrate. A width of the neck portion is less than a width of the bottom portion and a width of a portion of the top portion.
    Type: Application
    Filed: October 5, 2017
    Publication date: June 21, 2018
    Inventors: Chia-Wei CHANG, Chiung Wen Hsu, Yu-Ting WENG