Patents by Inventor Yu Wong

Yu Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11991479
    Abstract: The disclosure provides a time-lapse photographic device. The time-lapse photographic device includes a camera module, a drive module, an environment detection module, and a control unit. The drive module is connected to the camera module to drive the camera module to rotate. The environment detection module is configured to detect an external environment of the time-lapse photographic device to generate an environment detection signal. The control unit is electrically connected to the camera module, the drive module, and the environment detection module. The control unit generates, according to a shooting stop parameter, a plurality of intermittent drive signals to control the drive module, and controls the camera module to shoot at intervals of the drive signals. The control unit adjusts operation of at least one of the camera module and the drive module according to the environment detection signal.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: May 21, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Hsin-Yi Pu, Kai-Yu Hsu, Lai-Peng Wong, Chieh Li, Ting-Han Chang, Ching-Xsuan Chen
  • Patent number: 11978839
    Abstract: A light-emitting device includes a lead frame, a light-emitting diode (LED) chip, and an encapsulant. The LED chip is disposed on the lead frame, and includes a substrate, a semiconductor light-emitting unit disposed on a surface of the substrate, and a first electrode and a second electrode, which are disposed on the surface of the substrate, and which are located outwardly of the semiconductor light-emitting unit. The first and second electrodes are electrically connected to a lower surface of the semiconductor light-emitting unit, and are respectively connected to a first wiring bonding region and a second wiring bonding region on the lead frame. The encapsulant encapsulates the LED chip on the lead frame.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: May 7, 2024
    Assignee: QUANZHOU SANAN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Chen-ke Hsu, Changchin Yu, Zhaowu Huang, Junpeng Shi, Weng-Tack Wong
  • Publication number: 20240145596
    Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 2, 2024
    Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
  • Publication number: 20240143433
    Abstract: Methods and systems for detecting systemwide service issues by using anomaly localization. In an example, a method includes receiving time-series monitoring data for multiple services, the time-series monitoring data including multiple dimensions and an error metric; for the monitoring data from each service, evaluating scopes within the monitoring data based on an objective function for a time-series of the error metric to identify at least one anomalous scope, each scope including at least one dimension and a value for the dimension; based on evaluating the scopes, generating a ranked list of scopes for each service based on objective function scores for the scopes; correlating the ranked lists of scopes across the multiple services to identify a cross-service anomaly; and generating an alert for the services based on the cross-service anomaly, the alert indicating at least one scope as a potential root cause for the cross-service anomaly.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Mohit VERMA, Julien HOACHUCK, Qingwei LIN, Pooja RANI, Namrata JAIN, Rakesh NAMINENI, Jimmy WONG, Si QIN, Yu KANG, Jeffrey Ding HE, Yingnong DANG, Jian ZHANG, Bo QIAO, Kamaljit BATH
  • Patent number: 11956508
    Abstract: In some embodiments, a method receives a context for a user account and selects a plurality of collections for an interface. A collection includes one or more instances of content. The method analyzes a context for a user account to select a theme from a plurality of themes for a collection in the plurality of collections. The themes in the plurality of themes apply different display formats to the collection. The method sends an identifier for the theme and information for the collection to a client device being used by the user account to indicate to the interface the theme to use to display the collection with the plurality of collections.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 9, 2024
    Assignee: HULU, LLC
    Inventors: Trevor Callow, Mike Avitabile, Erika Palmer, Matthew Chun, Lena Bareket, Linda Sum, Darshana Umakanth, Dominic Hopton, Jason Wong, Yu Zhao, Heather Cho, Zachary Hinton, Josh Maldonado
  • Publication number: 20240105642
    Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Publication number: 20240100147
    Abstract: The present disclosure relates to a chimeric influenza virus hemagglutinin (HA) polypeptide, comprising one or more stem domain sequence, each having at least 60% homology with a stem domain consensus sequence of H1 subtype HA (H1 HA) and/or H5 subtype HA (H5 HA), fused with one or more globular head domain sequence, each having at least 60% homology with a globular head domain consensus sequence of H1 subtype HA (H1 HA) or H5 subtype HA (H5 HA).
    Type: Application
    Filed: November 3, 2023
    Publication date: March 28, 2024
    Inventors: Chi-Huey WONG, Hsin-Yu LIAO, Shih-Chi WANG, Yi-An KO, Kuo-I LIN, Che MA, Ting-Jen CHENG
  • Publication number: 20240097703
    Abstract: A lossless data compressor prevents normalization overruns on-the-fly as symbol occurrence counts are rounded to generate symbol frequencies, allowing an encoding table generator to generate encoding table entries without waiting for the symbol frequency table to finish filling. Rounding errors are accumulated as symbols are normalized and compensated for by reducing a symbol frequency when the symbol frequency is at least 2 and the accumulated errors have exceeded a threshold. The symbol frequency is also reduced when the number of remaining states in the encoding table is insufficient for a number of remaining unprocessed symbols and states for a current encoding table entry. Since error compensation occurs as symbols are being normalized, encoding table generation is not forced to wait for all symbols in the block to be processed, reducing latency. Three pipeline stages can operate on three input blocks: symbol counting, normalization/error compensation/encoding table generation, and data encoding.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Inventors: Hing-Mo LAM, Hailiang LI, Ho Yu WONG
  • Publication number: 20240088062
    Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Patent number: 11925693
    Abstract: Polymeric nanoparticles comprising a defined set of biologically active agents that provide for targeted stimulation of non-responsive T cells, e.g. T cells involved in cancer, are provided.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: March 12, 2024
    Inventors: Qian Yin, Yu Wong, Mark M. Davis
  • Patent number: 11918641
    Abstract: The present disclosure relates to a chimeric influenza virus hemagglutinin (HA) polypeptide, comprising one or more stem domain sequence, each having at least 60% homology with a stem domain consensus sequence of H1 subtype HA (H1 HA) and/or H5 subtype HA (H5 HA), fused with one or more globular head domain sequence, each having at least 60% homology with a globular head domain consensus sequence of H1 subtype HA (H1 HA) or H5 subtype HA (H5 HA).
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: March 5, 2024
    Assignee: ACADEMIA SINICA
    Inventors: Chi-Huey Wong, Hsin-Yu Liao, Shih-Chi Wang, Yi-An Ko, Kuo-I Lin, Che Ma, Ting-Jen Cheng
  • Publication number: 20240066113
    Abstract: The present invention relates to the mRNA vaccine of coronavirus spike protein with deletion of glycosites in the receptor binding domain (RBD), the subunit 1 (S1) domain, or the subunit 2 (S2) domain, or a combination thereof. The vaccine elicits broadly protective immune responses coronavirus and variants thereof.
    Type: Application
    Filed: April 12, 2022
    Publication date: February 29, 2024
    Inventors: Chi-Huey WONG, Chung-Yi WU, Che MA, Chen-Yu FAN
  • Publication number: 20240029153
    Abstract: A merchant's mobility data from their mobile device and their purchase history from a wholesale supplier may be used for underwriting a business loan. The mobility data may be analyzed into several descriptive statistics, which may characterize, in a sense, the person's behavior patterns. A merchant's purchase history from a wholesale supplier may be analyzed to estimate several business performance statistics. The estimated performance statistics and the mobility statistics, when combined, may generate an insightful and very accurate profile of a borrower. A machine learning system may use statistics derived from purchasing history as well as mobility information to accurately calculate a confidence score, which may reflect a loan applicant's likelihood of fully repaying a loan. The confidence score may be compared to a threshold value to determine whether to grant or deny a loan. The threshold value may be dynamically updated to meet a loan portfolio's financial objectives.
    Type: Application
    Filed: November 11, 2022
    Publication date: January 25, 2024
    Inventors: Ying Li, Joy He-Yueua, Reza Aghla Ardyan, Vivian Qian Yu Wong
  • Patent number: 11823856
    Abstract: An electrical switch including a switch housing, a switch circuit disposed within the switch housing. The switch circuit including includes a movable contact member mounted on a contact lever and a stationary contact member. The contact lever is configured for operable-interaction with an actuator. The actuator is configured for movement along an actuator movement axis relative to the contact lever between at least one of an OFF position whereby the contact lever is configured for arrangement in to the first configuration whereby the switch circuit is opened, and, an ON position in which the contact lever is configured for arrangement in to the second configuration whereby the switch circuit is closed.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: November 21, 2023
    Assignees: DEFOND COMPONENTS LIMITED, DEFOND ELECTECH CO., LTD.
    Inventor: Kin Yu Wong
  • Publication number: 20230317526
    Abstract: The present invention proposes a semiconductor device. The semiconductor device includes a first and a second transistor sets, a fin pattern, a rare earth oxide layer and an insulation layer. The first and a second transistor sets commonly have at the bases thereof a buried oxide layer (BOX), wherein the first transistor set has a rare earth oxide. The fin pattern on the BOX within a first region for the first transistor set and a second region for the second transistor set. The rare earth oxide layer includes the rare earth oxide and is formed on the BOX and the fin pattern in the first region. The insulation layer is formed on the rare earth oxide layer in the first region, the BOX and the fin pattern in the second region.
    Type: Application
    Filed: April 4, 2022
    Publication date: October 5, 2023
    Inventors: LIANG LI, Chun Yu Wong, John Zhang, HUANG LIU, Sunil Singh, Heng Yang
  • Publication number: 20230290855
    Abstract: The invention discloses a transistor structure including a substrate, a semiconductor layer disposed on the substrate and a gate layer disposed on the semiconductor layer, wherein the gate layer includes at least one gate having a first height, a first side and a second side opposite to the first side, a first dielectric spacer is disposed at the first side of the at least one gate, a first air spacer having a second height is disposed inside the first dielectric spacer, and the second height is lower than the first height.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Inventors: John H Zhang, Chun Yu Wong, Sunil K Singh, Liang Li, Heng Yang
  • Patent number: 11743678
    Abstract: The present invention provides a signal fusion system that is a probabilistic system fusing an arbitrary combination of heterogeneous signals for determining the location of electronic devices. The system includes a signal sampling device for detecting one or more signals emitted by an electronic device to be located, including geolocation signals, WiFi signals, Bluetooth signals, 4G communication signals, 5G communication signals, geomagnetism signals, or inertial navigation system signals (INS). A likelihood processor cooperates with the signal sampling device to receive information about selected sampled signals, and creates a grid of reference points for an interested area in which the electronic device may be located. The likelihood processor independently computes, for each selected sampled signal, a location likelihood that is a probability of observing the sampled signal given that the electronic device is located at different reference points in the grid.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: August 29, 2023
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Shueng Han Gary Chan, Man Yu Wong
  • Patent number: 11651915
    Abstract: An electrical switch device including a switch housing having first and second compartments separated by a partition; an electrical switch assembly disposed in the second compartment; a control knob configured for seating adjacent to the first compartment, and having a user engagement portion and a plunger configured to extend from user engagement portion from the first compartment in to the second compartment via an opening in the partition separating the first and second compartments when the control knob is seated, and said plunger being configured for movable interaction with the electrical switch assembly; and a sealing member including a base portion configured for securing of the sealing member to the housing, and, a tubular portion extending from the base portion and configured to surround the plunger so as to alleviate ingress of liquid from the first compartment in to the second compartment via the opening in the partition.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: May 16, 2023
    Assignee: DEFOND ELECTECH CO., LTD
    Inventor: Kin Yu Wong
  • Patent number: D1009241
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: December 26, 2023
    Assignee: PURACLENZ LLC
    Inventors: Christopher Patrick Dooley, Wing Kau Spencer Fok, Tin Yu Wong, Jeffrey L. Benner
  • Patent number: D1023269
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: April 16, 2024
    Assignee: PURACLENZ LLC
    Inventors: Christopher Patrick Dooley, Wing Kau Spencer Fok, Tin Yu Wong