Patents by Inventor Yuan-Bang Lee

Yuan-Bang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7611960
    Abstract: Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: November 3, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Chieh Liu, Chia-Hung Kao, Tzu-Yang Wu, Sheng-Liang Pan, Yuan-Bang Lee
  • Publication number: 20080061030
    Abstract: A method of patterning an indium tin oxide film includes the steps of forming a cap layer over the indium tin oxide film and subjecting exposed areas of the indium tin oxide film to a water plasma.
    Type: Application
    Filed: September 13, 2006
    Publication date: March 13, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sheng-Chieh Liu, Tzu-Yang Wu, Sheng-Liang Pan, Yuan-Bang Lee, U. H. Lin
  • Publication number: 20070249137
    Abstract: Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.
    Type: Application
    Filed: April 24, 2006
    Publication date: October 25, 2007
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Chieh Liu, Chia-Hung Kao, Tzu-Yang Wu, Sheng-Liang Pan, Yuan-Bang Lee
  • Patent number: 7140512
    Abstract: An interlocking lid which is suitable for a wet bench tank used in the processing of semiconductor wafer substrates. The interlocking lid includes a pair of lid panels typically provided with a clasp having elements for engaging and interlocking with each other when the lid panels are in a closed position. At least one of the lids may further include a beveled lid shoulder which facilitates runoff of liquids from and hinders pooling of liquids on the exterior surface of the lid.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: November 28, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Yuen-Sheng Hua, Chi-Shen Yang, Yuan-Bang Lee, Ming-Zhe Chiang
  • Publication number: 20060199393
    Abstract: An in-situ performed method utilizing a pure H2O plasma to remove a layer of resist from a substrate or wafer without substantially accumulating charges thereon. Also, in-situ performed methods utilizing a pure H2O plasma or a pure H2O vapor to release or remove charges from a surface or surfaces of a substrate or wafer that have accumulated during one or more IC fabrication processes.
    Type: Application
    Filed: May 17, 2006
    Publication date: September 7, 2006
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Bang Lee, Tzu-Yang Wu, Sheng-Liang Pan, U. Lin, Yu-Chih Lai, De-Fang Chen, Pei-Hsuan Lin, Shan-Hua Wu, Hung-Hsin Liu
  • Publication number: 20060175290
    Abstract: An pure H2O stripping process for etched metal wafers effectively solves the metal corrosion deficiencies induced by O2, N2 plasma charging. The pure H2O plasma stripping releases and neutralizes the storage of positive charge accumulated in the wafer, reduces chlorine concentration, and effectively strips the photoresist and etching residue. Thereby reducing metal corrosion and increases the anti-metal corrosion window. The pure H2O plasma stripping requires no additional equipment and or steps.
    Type: Application
    Filed: February 9, 2005
    Publication date: August 10, 2006
    Inventors: Yuan-Bang Lee, Tzu-Yang Wu, Sheng-Liang Pan, Chung-Yuan Cheng, Sheng-Chieh Liu
  • Publication number: 20050287814
    Abstract: An in-situ method of stripping a layer of resist from a substrate or wafer utilizes pure H2O plasma recipe to substantially prevent charges from accumulating on the substrate or wafer during stripping of the layer of resist.
    Type: Application
    Filed: May 27, 2005
    Publication date: December 29, 2005
    Inventors: Yuan-Bang Lee, Tzu-Yang Wu, Sheug-Liang Pan, U. Lin, Yu-Chih Lai, De-Fang Chen
  • Publication number: 20050155976
    Abstract: An interlocking lid which is suitable for a wet bench tank used in the processing of semiconductor wafer substrates. The interlocking lid includes a pair of lid panels typically provided with a clasp having elements for engaging and interlocking with each other when the lid panels are in a closed position. At least one of the lids may further include a beveled lid shoulder which facilitates runoff of liquids from and hinders pooling of liquids on the exterior surface of the lid.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 21, 2005
    Inventors: Yuen-Sheng Hua, Chi-Shen Yang, Yuan-Bang Lee, Ming-Zhe Chiang