Patents by Inventor Yuan-Hsun Wu

Yuan-Hsun Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984419
    Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang
  • Patent number: 8994197
    Abstract: An alignment mark includes a plurality of mark units. Each mark unit includes a first element and a plurality of second elements. Each second element includes opposite first and second end portions. The plurality of second elements are arranged along a direction. The first element extends adjacent to the first end portions of the plurality of second elements and parallel to the direction of the plurality of second elements.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: March 31, 2015
    Assignee: Nanya Technology Corporation
    Inventors: Chen Ku Chiang, Yuan Hsun Wu
  • Publication number: 20140206172
    Abstract: An alignment mark includes a plurality of mark units. Each mark unit includes a first element and a plurality of second elements. Each second element includes opposite first and second end portions. The plurality of second elements are arranged along a direction. The first element extends adjacent to the first end portions of the plurality of second elements and parallel to the direction of the plurality of second elements.
    Type: Application
    Filed: March 21, 2014
    Publication date: July 24, 2014
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: CHEN KU CHIANG, YUAN HSUN WU
  • Patent number: 8723341
    Abstract: An alignment mark includes a plurality of mark units. Each mark unit includes a first element and a plurality of second elements. Each second element includes opposite first and second end portions. The plurality of second elements are arranged along a direction. The first element extends adjacent to the first end portions of the plurality of second elements and parallel to the direction of the plurality of second elements.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: May 13, 2014
    Assignee: Nan Ya Technology Corporation
    Inventors: Chen Ku Chiang, Yuan Hsun Wu
  • Publication number: 20130161841
    Abstract: An alignment mark includes a plurality of mark units. Each mark unit includes a first element and a plurality of second elements. Each second element includes opposite first and second end portions. The plurality of second elements are arranged along a direction. The first element extends adjacent to the first end portions of the plurality of second elements and parallel to the direction of the plurality of second elements.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: Nan Ya Technology Corporation
    Inventors: Chen Ku CHIANG, Yuan Hsun Wu
  • Patent number: 8043794
    Abstract: A method of double patterning is disclosed. The method includes forming a first photosensitive layer; exposing the first photosensitive layer using a first reticle; developing the first photosensitive layer thereby forming a first image pattern including first elements; forming a second photosensitive layer; exposing the second photosensitive layer using the first reticle; and developing the second photosensitive layer thereby forming a second image pattern.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: October 25, 2011
    Assignee: Qimonda AG
    Inventors: Christoph Noelscher, Yi-Ming Chiu, Yuan-Hsun Wu
  • Patent number: 7811723
    Abstract: A phase-shift mask for forming a pattern includes a glass substrate and a pattern, a first phase-shift region, a second phase-shift region and a third phase-shift region on the glass substrate. The first phase-shift region and the second phase-shift region are alternately arranged and the third phase-shift regions are formed at the terminal ends of the first phase-shift region.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: October 12, 2010
    Assignee: Nanya Technology Corp.
    Inventors: Kuo-Kuei Fu, Yuan-Hsun Wu, Ya-Chih Wang
  • Publication number: 20090194840
    Abstract: A method of double patterning is disclosed. The method includes forming a first photosensitive layer; exposing the first photosensitive layer using a first reticle; developing the first photosensitive layer thereby forming a first image pattern including first elements; forming a second photosensitive layer; exposing the second photosensitive layer using the first reticle; and developing the second photosensitive layer thereby forming a second image pattern.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 6, 2009
    Inventors: Christoph Noelscher, Yi-Ming Chiu, Yuan-Hsun Wu
  • Publication number: 20090155699
    Abstract: A phase-shift mask for forming a pattern includes a glass substrate and a pattern, a first phase-shift region, a second phase-shift region and a third phase-shift region on the glass substrate. The first phase-shift region and the second phase-shift region are alternately arranged and the third phase-shift regions are formed at the terminal ends of the first phase-shift region.
    Type: Application
    Filed: May 29, 2008
    Publication date: June 18, 2009
    Inventors: Kuo-Kuei Fu, Yuan-Hsun Wu, Ya-Chih Wang
  • Patent number: 7504183
    Abstract: A phase-shifting mask suited for equal line/space, small pitched, dense line pattern is disclosed. The phase-shifting mask includes a transparent substrate, a partially shielded mesa line pattern of first phase formed on the substrate, and a clear recessed line pattern of second phase etched into the substrate and is disposed right next to the partially shielded mesa line pattern. The partially shielded mesa line pattern has a plurality of alternating 5%-10% transmittance light-shielding regions and clear regions of the first phase. The partially shielded mesa line pattern and the clear recessed line pattern have the same line width. The light that passes through the clear regions of the first phase and the light that passes through the clear recessed line pattern of second phase have a phase difference of 180 degree.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: March 17, 2009
    Assignee: Nanya Technology Corp.
    Inventors: Yung-Long Hung, Yuan-Hsun Wu, Chia-Tsung Hung
  • Patent number: 7504184
    Abstract: A phase-shifting mask suited for equal line/space, small pitched, dense line pattern is disclosed. The phase-shifting mask includes a transparent substrate, a partially shielded mesa line pattern of first phase formed on the substrate, and a 100% clear recessed line pattern of second phase etched into the substrate and is disposed right next to the partially shielded mesa line pattern. The partially shielded mesa line pattern has a plurality of alternating 45-degree, oblique areas and 100% transmittance clear regions of the first phase. The partially shielded mesa line pattern and the clear recessed line pattern have the same line width. The light that passes through the clear regions of the first phase and the light that passes through the clear recessed line pattern of second phase have a phase difference of 180 degree.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: March 17, 2009
    Assignee: Nanya Technology Corp.
    Inventors: Yung-Long Hung, Yuan-Hsun Wu
  • Patent number: 7419882
    Abstract: A small-size (w<0.5 micrometers) alignment mark in combination with a “k1 process” is proposed, which is particularly suited for the fabrication of trench-capacitor DRAM devices which requires highly accurate AA-DT alignment. The “k1 process” is utilized to etch away polysilicon studded in the alignment mark trenches and refresh the trench profile prior to AA pattern transferring, thereby improving wafer alignment accuracy and precision.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: September 2, 2008
    Assignee: Nanya Technology Corp.
    Inventors: Yuan-Hsun Wu, An-Hsiung Liu, Chiang-Lin Shih, Pei-Ing Lee, Hui-Min Mao, Lin-Chin Su
  • Patent number: 7205075
    Abstract: A method of forming a vertical memory device with a rectangular trench. First, a substrate covered by a photoresist layer is provided. Next, the photoresist layer is defined by a mask to form a rectangular opening, wherein the mask has two rectangular transparent patterns arranged with a predetermined interval. Next, the substrate is etched using the defined photoresist layer as a mask to form a single rectangular trench and the photoresist layer is then removed. Finally, a trench capacitor and a vertical transistor are successively formed in the rectangular trench to finish the vertical memory device.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: April 17, 2007
    Assignee: Nanya Technology Corporation
    Inventors: Yu-Sheng Shu, Yuan-Hsun Wu, Chung-Yuan Lee, Shian-Jyh Lin
  • Publication number: 20070054201
    Abstract: A phase shifting mask suited for equal line/space, small pitched, dense line pattern is disclosed. The phase shifting mask includes a transparent substrate, a partially shielded mesa line pattern of first phase formed on the substrate, and a transparent recessed line pattern of second phase etched into the substrate and is disposed right next to the partially shielded mesa line pattern. The partially shielded mesa line pattern has a plurality of alternating opaque regions and transparent regions of the first phase. The partially shielded mesa line pattern and the clear recessed line pattern have the same line width. The light that passes through the transparent regions of the first phase and the light that passes through the transparent recessed line pattern of second phase have a phase difference of 180 degree.
    Type: Application
    Filed: August 7, 2006
    Publication date: March 8, 2007
    Inventors: Yung-Long Hung, Yuan-Hsun WU, Chia-Tsung Hung
  • Patent number: 7165233
    Abstract: An H-shaped test key layout for exclusively monitoring 3-foil lens aberration effects during the fabrication of deep-trench capacitor memory devices is disclosed. The COMA lens aberration effect that used to occur along with the 3-foil lens aberration effect is now eliminated by this test key layout.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: January 16, 2007
    Assignee: Nanya Technology Corp.
    Inventor: Yuan-Hsun Wu
  • Publication number: 20060240332
    Abstract: A phase-shifting mask suited for equal line/space, small pitched, dense line pattern is disclosed. The phase-shifting mask includes a transparent substrate, a partially shielded mesa line pattern of first phase formed on the substrate, and a clear recessed line pattern of second phase etched into the substrate and is disposed right next to the partially shielded mesa line pattern. The partially shielded mesa line pattern has a plurality of alternating 5%-10% transmittance light-shielding regions and clear regions of the first phase. The partially shielded mesa line pattern and the clear recessed line pattern have the same line width. The light that passes through the clear regions of the first phase and the light that passes through the clear recessed line pattern of second phase have a phase difference of 180 degree.
    Type: Application
    Filed: June 24, 2005
    Publication date: October 26, 2006
    Inventors: Yung-Long Hung, Yuan-Hsun WU, Chia-Tsung Hung
  • Publication number: 20060240333
    Abstract: A phase-shifting mask suited for equal line/space, small pitched, dense line pattern is disclosed. The phase-shifting mask includes a transparent substrate, a partially shielded mesa line pattern of first phase formed on the substrate, and a 100% clear recessed line pattern of second phase etched into the substrate and is disposed right next to the partially shielded mesa line pattern. The partially shielded mesa line pattern has a plurality of alternating 45-degree, oblique areas and 100% transmittance clear regions of the first phase. The partially shielded mesa line pattern and the clear recessed line pattern have the same line width. The light that passes through the clear regions of the first phase and the light that passes through the clear recessed line pattern of second phase have a phase difference of 180 degree.
    Type: Application
    Filed: June 27, 2005
    Publication date: October 26, 2006
    Inventors: Yung-Long Hung, Yuan-Hsun WU
  • Publication number: 20060234440
    Abstract: A small-size (w<0.5 micrometers) alignment mark in combination with a “k1 process” is proposed, which is particularly suited for the fabrication of trench-capacitor DRAM devices which requires highly accurate AA-DT alignment. The “k1 process” is utilized to etch away polysilicon studded in the alignment mark trenches and refresh the trench profile prior to AA pattern transferring, thereby improving wafer alignment accuracy and precision.
    Type: Application
    Filed: July 5, 2005
    Publication date: October 19, 2006
    Inventors: Yuan-Hsun WU, An-Hsiung Liu, Chiang-Lin Shih, Pei-Ing Lee, Hui-Min Mao, Lin-Chin Su
  • Publication number: 20060121368
    Abstract: A photomask structure for reducing lens aberration and pattern displacement and method thereof. The photomask consists of a transparent substrate and a light-shielding layer, with the light-shielding layer including an array pattern area and a plurality of assist patterns disposed therein. The distance between the assist pattern and its upper and lower array patterns is equal, and the length of the assist pattern is equal to the width of the array pattern. The method of reducing lens aberration and pattern displacement includes providing a substrate covered by a photoresist layer, forming patterns on the photoresist layer by a photomask, and etching an array trench area in the substrate using a patterned photoresist as a mask. According to the present invention, the uniformity of critical dimension between array patterns is improved and pattern displacement is reduced significantly.
    Type: Application
    Filed: January 23, 2006
    Publication date: June 8, 2006
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventor: Yuan-Hsun Wu
  • Patent number: 7014965
    Abstract: A photolithography method for reducing effects of lens aberration. A photolithography apparatus is provided with a first reticle therein, having at least one first rectangular pattern thereon, a first photolithography is performed on a wafer by the photolithography apparatus to transfer the first rectangular pattern thereonto by simultaneously moving the first reticle and the wafer in a direction parallel to the short sides of the first rectangular pattern. The first reticle is replaced with a second reticle having at least one second rectangular pattern thereon and a second photolithography is performed by the photolithography apparatus to transfer the second rectangular pattern onto the wafer by simultaneously moving the second reticle and the wafer in a 90° plus or minus rotation in a direction parallel to the short sides of the second rectangular pattern.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: March 21, 2006
    Assignee: Nanya Technology Corporation
    Inventors: Chun-Cheng Liao, Yuan-Hsun Wu