Abstract: A multidrop network system includes N network devices including a master device and a plurality of slave devices. The N network devices synchronize their respective time zones in a synchronization phase, then jointly perform equalizer coefficient training in a training phase, and then obtain their respective transmission opportunities in turn in a data transmission phase. Each network device includes a channel equalizer trained in the training phase and used for processing data in the data transmission phase. In the training phase, the master device sends out a training notification to request the slave devices to enter the training phase; the master device performs the equalizer coefficient training after it transmits the training notification, and the slave devices perform the equalizer coefficient training after they receive the training notification. After the completion of the equalizer coefficient training, the master device sends out a beacon to start the data transmission phase.

Abstract: A method for a multidrop network system is provided. The method includes the following steps: transmitting, by a first node, a sleep request message to a second node; and determining, by the first node, whether to enter a sleep state from a wakeup state according to the condition in which the second node transmits a sleep acknowledge message in response to the sleep request message.

Abstract: A multidrop network system includes N network devices including a master device and a plurality of slave devices. The N network devices synchronize their respective time zones in a synchronization phase, then jointly perform equalizer coefficient training in a training phase, and then obtain their respective transmission opportunities in turn in a data transmission phase. Each network device includes a channel equalizer trained in the training phase and used for processing data in the data transmission phase. In the training phase, the master device sends out a training notification to request the slave devices to enter the training phase; the master device performs the equalizer coefficient training after it transmits the training notification, and the slave devices perform the equalizer coefficient training after they receive the training notification. After the completion of the equalizer coefficient training, the master device sends out a beacon to start the data transmission phase.

Abstract: A signal processor includes a signal receiving circuit, a pre-processing circuit, a period acquisition circuit, and a decoding circuit. The signal receiving circuit is configured to receive an input signal. The pre-processing circuit is configured to generate a square wave signal according to the input signal. The period acquisition circuit is configured to capture several periods of the square wave signal. The several signal periods includes several signal period groups, and each of the several signal period groups includes at least two signal periods of the several signal periods. The at least two signal periods are adjacent to each other. The decoding circuit is coupled to the period acquisition circuit and is configured to perform decoding according to a time length and a number of times of voltage value change of the several signal period groups to obtain a decoding result.

Abstract: A method for a multidrop network system is provided. The method includes the following steps: transmitting, by a first node, a sleep request message to a second node; and determining, by the first node, whether to enter a sleep state from a wakeup state according to the condition in which the second node transmits a sleep acknowledge message in response to the sleep request message.

Abstract: A signal processor includes a signal receiving circuit, a pre-processing circuit, a period acquisition circuit, and a decoding circuit. The signal receiving circuit is configured to receive an input signal. The pre-processing circuit is configured to generate a square wave signal according to the input signal. The period acquisition circuit is configured to capture several periods of the square wave signal. The several signal periods includes several signal period groups, and each of the several signal period groups includes at least two signal periods of the several signal periods. The at least two signal periods are adjacent to each other. The decoding circuit is coupled to the period acquisition circuit and is configured to perform decoding according to a time length and a number of times of voltage value change of the several signal period groups to obtain a decoding result.

Abstract: A communication device is disclosed. The communication device includes a transceiver circuit, an echo canceler, and a processor. The transceiver circuit is configured to transmit a test signal to a channel. The echo canceler is configured to obtain a plurality of echo power of a reflected signal corresponding to the test signal. The processor is configured to obtain a plurality of positions on the channel according to a parameter value. The parameter value is N, a number of the plurality of positions is N, and the plurality of positions corresponds to the top N largest of the plurality of echo power. The echo canceler is further configured to eliminate part of the plurality of echo power corresponding to the plurality of positions according to the plurality of positions.

Abstract: A communication device is disclosed. The communication device includes a transceiver circuit, an echo canceler, and a processor. The transceiver circuit is configured to transmit a test signal to a channel. The echo canceler is configured to obtain a plurality of echo power of a reflected signal corresponding to the test signal. The processor is configured to obtain a plurality of positions on the channel according to a parameter value. The parameter value is N, a number of the plurality of positions is N, and the plurality of positions corresponds to the top N largest of the plurality of echo power. The echo canceler is further configured to eliminate part of the plurality of echo power corresponding to the plurality of positions according to the plurality of positions.

Abstract: An electronic system includes a feedforward equalizer, a feedback equalizer, an RFI canceler, and a control circuit. The feedforward equalizer and the feedback equalizer are configured to adjust the channel response of a transmission channel in the electronic system. The RFI canceler is configured to cancel the RFI presence in the electronic system. When the RFI canceler is off, the controller is configured to turn on the RFI canceler according to a signal error value before RFI cancelation, an error term of the electronic system, or an SNR of the electronic system.

Abstract: A network apparatus for eliminating interference between transport ports includes a plurality of transport ports, a plurality of seed comparators, and a control unit. The plurality of seed comparators are coupled to the plurality of transport ports, respectively, wherein a first seed comparator is utilized for comparing a first seed of a first transport port with a second seed of a second transport port and accordingly generating a comparing result. The controlling unit is coupled to the plurality of seed comparators and the plurality of transport ports, for generating a control signal to cancel interference between the plurality of transport ports according to the comparing result.

Abstract: The disclosure provides a network signal receiving system and a network signal receiving method. The network signal receiving system comprises: a high pass filter, a canceller, and an adder. The high pass filter is utilized for performing a high pass filtering operation for an audio data signal to output at least a signal corresponding to transitions of the audio data signal, wherein the audio data signal is synchronized with a network data signal. The canceller is coupled to the high pass filter, and utilized for generating a noise cancelling signal according to the at least a signal output by the high pass filter. The adder is coupled to the canceller, utilized for receiving the network data signal and the noise cancelling signal, so as to use the noise cancelling signal to cancel at least a noise in the network data signal, which is corresponding to the at least a signal.

Abstract: A network receiver includes a first variable resistor, a second variable resistor, a first processing unit, a second processing unit and an adjusting circuit. The first variable resistor is coupled to a first transmission line via a first terminal for transmitting a first signal. The second variable resistor is coupled to a second transmission line via a second terminal for transmitting a second signal. The first processing unit is utilized for obtaining a difference according to the first signal and the second signal, and processing the difference to generate first data. The second processing unit is utilized for obtaining a summation according to the first signal and the second signal, and processing the summation to generate second data. The adjusting circuit is utilized for adjusting resistance(s) of at least one of the first variable resistor and the second variable resistor according to the first data and the second data.

Abstract: A transceiver for dynamically adjusting a transmission clock includes: a transmitting unit, a receiving unit, and a transmission clock tracking unit. The transmitting unit is arranged for transmitting a transmission signal according to the transmission clock. The receiving unit is arranged for receiving a reception signal. The transmission clock tracking unit is coupled to the transmitting unit and the receiving unit, and arranged for dynamically controlling the transmission clock of the transmitting unit according to a reception clock corresponding to the reception signal.

Abstract: A communication device has a transmitting circuit, a receiving circuit, and a controller. The transmitting circuit transmits a first data to a transmission line. The first data is generated by a first scrambler wherein the values of the registers of the first scrambler are characterized by a first combination number. The receiving circuit receives a second data scrambled by a second scrambler from the transmission line. The first and the second scramblers have the same scrambler generator polynomial. The receiving circuit has a descrambler having a plurality of registers for descrambling the second data. The values of the registers of the second scrambler are characterized by a second combination number when the descrambler descrambles the second data. The controller configures the values of the registers of the first scrambler according to the first combination number, the second combination number, and/or a difference between the first and the second combination numbers.

Abstract: A network receiver and the adjusting method thereof, the network receiver includes a first delay unit, a second delay unit, a first processing unit and an adjusting circuit. The first delay unit is for delaying a first signal received from a first transmission line to generate a delayed first signal. The second delay unit is for delaying a second signal received from a second transmission line to generate a delayed second signal. The first processing unit is for processing a difference between the delayed first signal and the delayed second signal to generate first data. The adjusting circuit adjusts the first and second delay units to have a plurality of delay amount combinations, the first processing unit generates a plurality of first data respectively corresponding to the delay amount combinations, and the adjusting circuit adjusts delay amount of the first and second delay units according to the first data.

Abstract: A network device, for supporting a power saving mechanism through an auto-negotiation of HDMI, includes a transmitting circuit and a receiving circuit. The transmitting circuit is arranged for generating a link pulse signal to a second network device, wherein the network device and the second network device perform the auto-negotiation of a network connection by using the link pulse signal through HDMI in order to support the power saving mechanism. After the receiving circuit of the network device receives another link pulse signal transmitted from the second network device through HDMI, the network device is controlled to be operated under the power saving mechanism.

Abstract: A signal transceiving method, applied to a signal transceiver, includes: adjusting to approximate a value of a clock frequency of a signal to be transmitted from the signal transceiver to a value of a clock frequency of a received signal; performing an echo cancellation operation; computing a distance between a first certification code transmitted by the signal transceiver and a second certification code received by the signal transceiver; and stopping the echo cancellation operation when the distance is smaller than a threshold value.

Abstract: A transceiver includes a transceiver and a clock generation unit. The clock generation unit includes a clock generator, a multiplexer, and a frequency difference detector. The transceiver exchanges data with a link partner according to a first clock generated by a phase-locked loop. The clock generator is used for generating and outputting a second clock. The multiplexer is used for receiving a calibration clock or a receiver clock of the link partner, and outputting the calibration clock or the receiver clock of the link partner. The frequency difference detector is used for generating a difference signal according to a difference between the calibration clock and the second clock, or a difference between the receiver clock of the link partner and the second clock. The clock generator adjusts the shift of the second clock according to the difference signal. The phase-locked loop generates the first clock according to the second clock.

Abstract: A master/slave decision device applied to a first network device is provided, where the first network device is coupled to a second network device, and the master/slave decision device includes a seed distance detection unit and a decision unit. The seed distance decision unit is utilized for detecting a seed distance between a first seed utilized in a first scrambler of the first network device and a second seed utilized in a second scrambler of the second network device. The decision unit is coupled to the seed distance detecting unit, and is utilized for determining the first network device to be a master device or a slave device according to the seed distance.

Abstract: A transceiver includes a transceiver and a clock generation unit. The clock generation unit includes a clock generator, a multiplexer, and a frequency difference detector. The transceiver exchanges data with a link partner according to a first clock generated by a phase-locked loop. The clock generator is used for generating and outputting a second clock. The multiplexer is used for receiving a calibration clock or a receiver clock of the link partner, and outputting the calibration clock or the receiver clock of the link partner. The frequency difference detector is used for generating a difference signal according to a difference between the calibration clock and the second clock, or a difference between the receiver clock of the link partner and the second clock. The clock generator adjusts the shift of the second clock according to the difference signal. The phase-locked loop generates the first clock according to the second clock.