Patents by Inventor Yuan Lei
Yuan Lei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240176353Abstract: The present invention provides a method of alerting to stationary objects for vehicle. When a vehicle moves at a first speed, an optical scanning device, an infrared image extraction device, and an image extraction device extract a first optical scanning image, a first infrared image, and a first ambient image of the ambiance on one side of the vehicle. According to the fusion algorithm and the optical flow method, the first obstacle information of the first obstacle in the first image will be given. According to the location information of the first obstacle, the vehicle computer judges and generates an alert message when the relative distance is smaller than a distance threshold value and the obstacle volume is greater than a volume threshold value.Type: ApplicationFiled: July 6, 2023Publication date: May 30, 2024Inventors: TSUNG-HAN LEE, JINN-FENG JIANG, SHIH-CHUN HSU, TSU-KUN CHANG, CHENG-TAI LEI, HUNG-YUAN WEI
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Patent number: 11996519Abstract: A gel composition, in particular a gelled electrolyte, comprising: i) fumed alumina particles, wherein the mean primary particle size of the particle is from 5 to 50 nm and the BET specific surface area is from 40 to 400 m2/g; ii) at least two organic solvents; and iii) a lithium salt; wherein the amount of the alumina particles is 0.2-10% by weight based on the total weight of the gel composition. A method to prepare a gelled electrolyte, a Li-ion battery, a Li-ion battery and a device are also provided.Type: GrantFiled: September 9, 2019Date of Patent: May 28, 2024Assignee: Evonik Operations GmbHInventors: Shasha Su, Jinhua Jiang, Jing Feng, Dong Wang, Yuan-Chang Huang, Jun Yang, Bin Lei, Zhixin Xu
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Publication number: 20240168437Abstract: There is provided a metasurface structure including a plurality of sub-wavelength structures operable to manipulate optical signal/radiation to which metasurface structure is exposed to or irradiated with. The plurality of sub-wavelength structures is arranged such that the metasurface structure is operable to display a first image based on image data embedded or encoded by the sub-wavelength structures when the metasurface structure is exposed to or irradiated with a first optical signal/radiation, and the metasurface structure is operable to display a second image based on image data embedded or encoded by the sub-wavelength structures when the metasurface structure is exposed to or irradiated with a second optical signal/radiation different from the first optical signal/radiation. The first image includes an optical-printing image and the second image includes one or more holographic images.Type: ApplicationFiled: November 7, 2023Publication date: May 23, 2024Inventors: Dangyuan Lei, Yulong Fan, Zhuochao Wang, Yuan Liao
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Publication number: 20240107640Abstract: An LED driving device with an adjustable dimming depth is provided. The LED driving device includes an LED driver and a dimming depth control circuit. The LED driver includes a dimming control circuit and a driving circuit. The dimming control circuit generates a first pulse-width modulation (PWM) signal according to a first brightness indication signal. The driving circuit drives a first light source and adjusts a brightness of the first light source. A duty ratio of the first PWM signal and the first driving current have a first relationship therebetween. The dimming depth control circuit includes a first variable resistance circuit, and the first variable resistance circuit controls a magnitude of a first variable resistance between a first current sampling terminal and a ground terminal according to a first dimming depth control signal. The first relationship defines a first dimming depth that varies with the first variable resistance.Type: ApplicationFiled: August 7, 2023Publication date: March 28, 2024Inventors: XIAO-LEI ZHU, YUAN-YUAN LIN, SHENG-JU CHUNG
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Patent number: 11940367Abstract: A device for simulating carbon dioxide storage in a deep saline aquifer, including a CO2 gas source, first and second valves, first and second pressure pumps, first, second and third pressure gauges, a water storage tank, a simulation box, a first flow meter, a gas-liquid separator, a recycling tank, a microcomputer-display assembly, a structure plate, core holders, an injection pipeline, a connection pipeline, a baffle, a piezometer, a second flow meter, a heater, a lifter and an acoustic logging tool. The CO2 gas source, the first valve, the first pressure pump and the first pressure gauge for gas injection. The water storage tank, a second pressure pump and a second pressure gauge for water injection. The second valve, the third pressure gauge, the first flow meter, the gas-liquid separator and the recycling tank form an output pipeline.Type: GrantFiled: November 3, 2023Date of Patent: March 26, 2024Assignee: Southwest Petroleum UniversityInventors: Ping Yue, Hongnan Yang, Yuan Lei, Xu Zheng, Peng Song, Pengyu Chen, Zhouhua Wang, Simin Qu
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Publication number: 20240068923Abstract: A device for simulating carbon dioxide storage in a deep saline aquifer, including a CO2 gas source, first and second valves, first and second pressure pumps, first, second and third pressure gauges, a water storage tank, a simulation box, a first flow meter, a gas-liquid separator, a recycling tank, a microcomputer-display assembly, a structure plate, core holders, an injection pipeline, a connection pipeline, a baffle, a piezometer, a second flow meter, a heater, a lifter and an acoustic logging tool. The CO2 gas source, the first valve, the first pressure pump and the first pressure gauge for gas injection. The water storage tank, a second pressure pump and a second pressure gauge for water injection. The second valve, the third pressure gauge, the first flow meter, the gas-liquid separator and the recycling tank form an output pipeline.Type: ApplicationFiled: November 3, 2023Publication date: February 29, 2024Inventors: Ping YUE, Hongnan YANG, Yuan LEI, Xu ZHENG, Peng SONG, Pengyu CHEN, Zhouhua WANG, Simin QU
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Publication number: 20220147792Abstract: A processor for generating binarized weights for a neural network. The processor comprises a binarization scheme generation module configured to generate, for a group of weights taken from a set of input weights for one or more layers of a neural network, one or more potential binary weight strings representing said group of weights; a binarization scheme selection module configured to select a binary weight string to represent said group of weights, from among the one or more potential binary weight strings, based at least in part on a number of data bits required to represent the one or more potential binary weight strings according to a predetermined encoding method; and a weight generation module configured to output data representing the selected binary weight string for representing the group of weights.Type: ApplicationFiled: November 12, 2021Publication date: May 12, 2022Applicant: UNITED MICROELECTRONICS CENTRE (HONG KONG) LIMITEDInventors: Yuzhong JIAO, Xiao HUO, Yuan LEI
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Publication number: 20220019872Abstract: Examples of the present disclosure include a processor for implementing a binarized convolutional neural network (BCNN). The processor includes a shared logic module that is capable of performing both a binarized convolution operation and a down-sampling operation. The shared logic module is switchable between a convolution mode and a down-sampling mode by adjusting parameters of the shared logic module. In some examples the processor may be logic chip.Type: ApplicationFiled: July 13, 2021Publication date: January 20, 2022Applicant: UNITED MICROELECTRONICS CENTRE (HONG KONG) LIMITEDInventors: Yuan LEI, Peng LUO
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Patent number: 11176447Abstract: A deep neural network models semiconductor devices. Measurements of test transistors are gathered into training data including gate and drain voltages and transistor width and length, and target data such as the drain current measured under the input conditions. The training data is converted by an input pre-processor that can apply logarithms of the inputs or perform a Principal Component Analysis (PCA). Rather than use measured drain current as the target when training the deep neural network, a target transformer transforms the drain current into a transformed drain current, such as a derivative of the drain current with respect to gate or drain voltages, or a logarithm of the derivative. Weights in the deep neural network are adjusted during training by comparing the deep neural network's output to the transformed drain current and generating a loss function that is minimized over the training data.Type: GrantFiled: June 19, 2018Date of Patent: November 16, 2021Assignee: Hong Kong Applied Science and Technology Research Institute Company LimitedInventors: Yuan Lei, Xiao Huo
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Patent number: 10885256Abstract: An existing layout of an Integrated Circuit (IC) is migrated to two or more target layouts for different semiconductor processes with different design rules. The existing layout file is parsed for data items such as boundaries, paths, text, and cell instances to generate a layout database file with a text format. A layout engineer selects functions from a layout design toolkit and writes reusable code with these functions. Placement functions can specify relative locations to other data items that are dependent on the design rules. Routing functions allow interconnect to be re-routed after placements are adjusted for various target design rules. An analog layout expertise integrator replaces some of the data items in the layout database file with the reusable code to generate a reusable layout database. A layout generator compiles the reusable layout database and converts it to multiple target layouts for multiple design rules.Type: GrantFiled: February 4, 2020Date of Patent: January 5, 2021Inventors: Yuan Lei, Chenyue Ma
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Publication number: 20190385047Abstract: A deep neural network models semiconductor devices. Measurements of test transistors are gathered into training data including gate and drain voltages and transistor width and length, and target data such as the drain current measured under the input conditions. The training data is converted by an input pre-processor that can apply logarithms of the inputs or perform a Principal Component Analysis (PCA). Rather than use measured drain current as the target when training the deep neural network, a target transformer transforms the drain current into a transformed drain current, such as a derivative of the drain current with respect to gate or drain voltages, or a logarithm of the derivative. Weights in the deep neural network are adjusted during training by comparing the deep neural network's output to the transformed drain current and generating a loss function that is minimized over the training data.Type: ApplicationFiled: June 19, 2018Publication date: December 19, 2019Inventors: Yuan LEI, Xiao HUO
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Patent number: 10236685Abstract: A power electronic voltage transforming apparatus is used in a two-phase to single-phase conversion. The power electronic voltage transforming apparatus is cooperatively used with a three-phase to two-phase transformer to convert the two-phase power output from the three-phase to two-phase transformer into single-phase power. The two-phase to single-phase power electronic voltage transforming apparatus or three-phase to single-phase power electronic voltage transforming apparatus has an input cascade connection structure formed by cascading n converter modules.Type: GrantFiled: November 2, 2017Date of Patent: March 19, 2019Assignee: SOUTHWEST JIAOTONG UNIVERSITYInventors: Zeliang Shu, Linghui Meng, Wenjun Mao, Yuan Lei, Yi Qian, Xiaoqiong He
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Publication number: 20180375326Abstract: The present invention provides a power electronic voltage transforming apparatus, which relates to the fields of electrified railway traction power supply technology, the industrial electricity etc. The power electronic voltage transforming apparatus can solve the problems of dynamic control of negative-sequence current, compensation of reactive power and phase separation of traction network, and can also solve the imbalance of voltage and current caused by adding single-phase load in other industrial power applications. The two-phase to single-phase power electronic voltage transforming apparatus or three-phase to single-phase power electronic voltage transforming apparatus has an input cascade connection structure formed by cascading n converter modules.Type: ApplicationFiled: November 2, 2017Publication date: December 27, 2018Applicant: Southwest Jiaotong UniversityInventors: Zeliang SHU, Linghui MENG, Wenjun MAO, Yuan LEI, Yi QIAN, Xiaoqiong HE
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Patent number: 9142513Abstract: An approach for providing MOL constructs using diffusion contact structures is disclosed. Embodiments include: providing a first diffusion region in a substrate; providing, via a first lithography process, a first diffusion contact structure; providing, via a second lithography process, a second diffusion contact structure; and coupling the first diffusion contact structure to the first diffusion region and the second diffusion contact structure. Embodiments include: providing a second diffusion region in the substrate; providing a diffusion gap region between the first and second diffusion regions; providing the diffusion contact structure over the diffusion gap region; and coupling, via the diffusion contact structure, the first and second diffusion regions.Type: GrantFiled: March 12, 2015Date of Patent: September 22, 2015Assignee: GLOBALFOUNDRIES INC.Inventors: Mahbub Rashed, Yuansheng Ma, Irene Lin, Jason Stephens, Yunfei Deng, Yuan Lei, Jongwook K E, Roderick Augur, Shibly Ahmed, Subramani Kengeri, Suresh Venkatesan
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Patent number: 9006100Abstract: An approach for providing MOL constructs using diffusion contact structures is disclosed. Embodiments include: providing a first diffusion region in a substrate; providing, via a first lithography process, a first diffusion contact structure; providing, via a second lithography process, a second diffusion contact structure; and coupling the first diffusion contact structure to the first diffusion region and the second diffusion contact structure. Embodiments include: providing a second diffusion region in the substrate; providing a diffusion gap region between the first and second diffusion regions; providing the diffusion contact structure over the diffusion gap region; and coupling, via the diffusion contact structure, the first and second diffusion regions.Type: GrantFiled: August 7, 2012Date of Patent: April 14, 2015Assignee: GLOBALFOUNDRIES Inc.Inventors: Mahbub Rashed, Yuansheng Ma, Irene Lin, Jason Stephens, Yunfei Deng, Yuan Lei, Jongwook Kye, Rod Augur, Shibly Ahmed, Subramani Kengeri, Suresh Venkatesan
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Patent number: 8952945Abstract: A display and a gate driver are disclosed herein, in which the gate driver includes a number of gate driving units, and each of the gate driving units includes a control circuit, a boost circuit, a driver output circuit and a voltage stabilized circuit. The control circuit is electrically connected to a previous gate driving unit and a next gate driving unit. The boost circuit is electrically connected to the control circuit for driving the next gate driving unit. The driver output circuit is electrically connected to the boost circuit and a pixel array for driving at least one scan line in the pixel array. The voltage stabilizing circuit is electrically connected to the boost circuit and the driver output circuit.Type: GrantFiled: March 13, 2013Date of Patent: February 10, 2015Assignee: AU Optronics CorporationInventors: Kuan-Chun Huang, Chen-Yuan Lei, Liang-Chen Lin, Pi-Chun Yeh
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Patent number: 8653526Abstract: A display panel having a display area and a gate driving area includes a gate line and plural pixel units in the display area, and a gate driver circuit in the gate driving area. The gate line connects to the pixel units. The gate driver circuit connects to the gate line. The gate driver includes a driving transistor and a driving storage capacitor stacked to each other to form a stack structure, which includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, a first semiconductor layer, a drain electrode, and a source electrode, which is connected to the gate line. The driving storage capacitor is formed by the first electrode, the first dielectric layer, and the second electrode. The driving transistor is formed by the second electrode, the second dielectric layer, the first semiconductor layer, the source electrode, and the drain electrode.Type: GrantFiled: March 15, 2013Date of Patent: February 18, 2014Assignee: AU Optronics CorporationInventors: Chen-Yuan Lei, Meng-Chieh Tsai
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Publication number: 20140042641Abstract: An approach for providing MOL constructs using diffusion contact structures is disclosed. Embodiments include: providing a first diffusion region in a substrate; providing, via a first lithography process, a first diffusion contact structure; providing, via a second lithography process, a second diffusion contact structure; and coupling the first diffusion contact structure to the first diffusion region and the second diffusion contact structure. Embodiments include: providing a second diffusion region in the substrate; providing a diffusion gap region between the first and second diffusion regions; providing the diffusion contact structure over the diffusion gap region; and coupling, via the diffusion contact structure, the first and second diffusion regions.Type: ApplicationFiled: August 7, 2012Publication date: February 13, 2014Applicant: GLOBALFOUNDRIES INC.Inventors: Mahbub Rashed, Yuansheng Ma, Irene Lin, Jason Stephens, Yunfei Deng, Yuan Lei, Jongwook Kye, Rod Augur, Shibly Ahmed, Subramani Kengeri, Suresh Venkatesan
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Publication number: 20140035889Abstract: A display and a gate driver are disclosed herein, in which the gate driver includes a number of gate driving units, and each of the gate driving units includes a control circuit, a boost circuit, a driver output circuit and a voltage stabilized circuit. The control circuit is electrically connected to a previous gate driving unit and a next gate driving unit. The boost circuit is electrically connected to the control circuit for driving the next gate driving unit. The driver output circuit is electrically connected to the boost circuit and a pixel array for driving at least one scan line in the pixel array. The voltage stabilizing circuit is electrically connected to the boost circuit and the driver output circuit.Type: ApplicationFiled: March 13, 2013Publication date: February 6, 2014Applicant: AU OPTRONICS CORPORATIONInventors: Kuan-Chun HUANG, Chen-Yuan LEI, Liang-Chen LIN, Pi-Chun YEH
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Publication number: 20130052899Abstract: A resin-and-fiber includes a base layer and a molded layer integrally bonding the base layer. The base layer includes a fiber layer made of fiber woven fabric and a resin layer made of transparent or translucent resin. The fiber layer has a first surface and an opposite second surface. The resin layer bonds the first surface and penetrating into the fiber layer. The molded layer is made of resin and integrally bonding the second surface of the fiber layer. A method for making the present resin-and-fiber composite is also provided.Type: ApplicationFiled: November 23, 2011Publication date: February 28, 2013Applicants: FIH (HONG KONG) LIMITED, SHENZHEN FUTAIHONG PRECISION INDUSTRY CO., LTD.Inventors: WU LI, QIANG ZHANG, XUAN-ZHAN ZENG, DA-QING HUANG, YUAN-LEI ZHANG, ZHI-WEI HU, MING-LIANG WANG, YUN-FENG HUANG, QING XIA, HE-JIE WEN