Patents by Inventor Yuan-Sheng Chiang

Yuan-Sheng Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9318381
    Abstract: A method of fabricating a conductive line of a semiconductor device is disclosed. The method includes the steps of: sequentially forming a conductive material layer and a mask on a semiconductor substrate, wherein a thickness of the conductive material layer is between 30000 angstroms (?) and 90000 angstrom (?); performing a first etching process to remove a part of the conductive material layer to form at least an upper side; and performing a second etching process to remove a part of the conductive material layer to form at least a lower side, wherein a curvature of the upper side is different from a curvature of the lower side.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: April 19, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Mu-Chin Chen, Yuan-Sheng Chiang, Chi-Sheng Hsiung
  • Publication number: 20150303104
    Abstract: A method of fabricating a conductive line of a semiconductor device is disclosed. The method includes the steps of: sequentially forming a conductive material layer and a mask on a semiconductor substrate, wherein a thickness of the conductive material layer is between 30000 angstroms (?) and 90000 angstrom (?); performing a first etching process to remove a part of the conductive material layer to form at least an upper side; and performing a second etching process to remove a part of the conductive material layer to form at least a lower side, wherein a curvature of the upper side is different from a curvature of the lower side.
    Type: Application
    Filed: July 1, 2015
    Publication date: October 22, 2015
    Inventors: Mu-Chin Chen, Yuan-Sheng Chiang, Chi-Sheng Hsiung
  • Patent number: 9117820
    Abstract: A conductive line of a semiconductor device includes a conductive layer disposed on a semiconductor substrate. A thickness of the conductive layer is substantially larger than 10000 angstrom (?), and at least a side of the conductive layer has at least two different values of curvature.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: August 25, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Mu-Chin Chen, Yuan-Sheng Chiang, Chi-Sheng Hsiung
  • Publication number: 20140042642
    Abstract: A conductive line of a semiconductor device includes a conductive layer disposed on a semiconductor substrate. A thickness of the conductive layer is substantially larger than 10000 angstrom (?), and at least a side of the conductive layer has at least two different values of curvature.
    Type: Application
    Filed: August 8, 2012
    Publication date: February 13, 2014
    Inventors: Mu-Chin Chen, Yuan-Sheng Chiang, Chi-Sheng Hsiung
  • Publication number: 20100105157
    Abstract: A process of a micro-display is provided. First, a substrate having a pixel region and a periphery circuit region is provided, in which a metal reflection layer is formed in the pixel region, and a periphery circuit is formed in the periphery circuit region. Next, a dielectric layer is formed on the substrate to cover the pixel region and the periphery circuit region. Then, a patterned mask layer exposing the dielectric layer on the metal reflection layer is formed on the dielectric layer. Thereafter, a portion of the exposed dielectric layer is removed by using the patterned mask layer as a mask. Next, the patterned mask layer is removed. And then, a portion of the dielectric layer is removed to expose the metal reflection layer.
    Type: Application
    Filed: October 27, 2008
    Publication date: April 29, 2010
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Hsun Lee, Yi-Tyng Wu, Wei-Chen Sun, Yuan-Sheng Chiang
  • Publication number: 20080111160
    Abstract: A semiconductor device is described, including a substrate, a transistor, a hard mask layer and an anti-reflection layer. The substrate includes a first area and a second area, wherein the second area includes a photosensing area. The transistor is disposed on the substrate in the first area and the hard mask layer over the substrate in the second area. The anti-reflection layer is disposed between the hard mask layer and the substrate.
    Type: Application
    Filed: December 11, 2007
    Publication date: May 15, 2008
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yuan-Sheng Chiang, Hsuan-Hsu Chen
  • Publication number: 20070099328
    Abstract: A semiconductor device is described, including a substrate, a transistor, a hard mask layer and an anti-reflection layer. The substrate includes a first area and a second area, wherein the second area includes a photosensing area. The transistor is disposed on the substrate in the first area and the hard mask layer over the substrate in the second area. The anti-reflection layer is disposed between the hard mask layer and the substrate.
    Type: Application
    Filed: October 31, 2005
    Publication date: May 3, 2007
    Inventors: Yuan-Sheng Chiang, Hsuan-Hsu Chen
  • Patent number: 6242730
    Abstract: A semiconductor image sensor includes a metal layer formed on a semiconductor substrate. An oxide layer is disposed over the semiconductor substrate to cover the metal layer. A SOG is disposed on the oxide layer, a color filter is disposed on the SOG and a silicon-oxy-nitride layer is disposed thereon. By using the high transmittance of the SOG and the silicon-oxy-nitride layer, the blue light transmittance by the semiconductor image sensor is therefore enhanced.
    Type: Grant
    Filed: June 3, 1999
    Date of Patent: June 5, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Shih-Yao Lin, Shu-Li Chen, Jeenh-Bang Yeh, Yuan-Sheng Chiang