Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.

Abstract: An electronic module can include a first integrated device package comprising a first substrate and an electronic component mounted to the first substrate. A first vertical interconnect can be mounted to and electrically connected to the first substrate. The first vertical interconnect can extend outwardly from the first substrate. The electronic module can include a second integrated device package comprising a second substrate and a second vertical interconnect having a first end mounted to and electrically connected to the second substrate. The second vertical interconnect can have a second end electrically connected to the first vertical interconnect. The first and second vertical interconnects can be disposed between the first and second substrates.

Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.

Abstract: An electronic module can include a first integrated device package comprising a first substrate and an electronic component mounted to the first substrate. A first vertical interconnect can be mounted to and electrically connected to the first substrate. The first vertical interconnect can extend outwardly from the first substrate. The electronic module can include a second integrated device package comprising a second substrate and a second vertical interconnect having a first end mounted to and electrically connected to the second substrate. The second vertical interconnect can have a second end electrically connected to the first vertical interconnect. The first and second vertical interconnects can be disposed between the first and second substrates.

Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.

Abstract: A stacked package configuration is described that includes a bottom package and an upper package. The bottom package includes a substrate having a top surface with first circuitry and metal first pads. A molded layer is then formed over the substrate. Holes through the molded layer are then laser drilled to expose the first pads. The holes and first pads align with leads of an upper package, which contains further circuit components. The holes are then partially filled with a solder paste. A thermal epoxy is applied between the molded layer and the upper package. The leads of the upper package are then inserted into the holes, and the solder paste is reflowed to electrically, thermally, and mechanically connect the upper package to the bottom package. The reflow heat also cures the epoxy. A ball grid array is then formed on the bottom of the substrate.

Abstract: In a multi-phase power converter, efficiency is increased and ripple reduced while maintaining transient response and dynamic performance improved by electrically coupling secondary windings of transformers or provided for inductors of respective phases such that current to a load is induced in each phase by current in another phase. Magnetic coupling can also be provided between phases using a multi-aperture core of a configuration which minimizes primary winding length and copper losses. Efficiency at light load is enhanced by controlling current in the series connection of secondary windings in either binary or analog fashion.

Abstract: In a multi-phase power converter, efficiency is increased and ripple reduced while maintaining transient response and dynamic performance improved by electrically coupling secondary windings of transformers or provided for inductors of respective phases such that current to a load is induced in each phase by current in another phase. Magnetic coupling can also be provided between phases using a multi-aperture core of a configuration which minimizes primary winding length and copper losses. Efficiency at light load is enhanced by controlling current in the series connection of secondary windings in either binary or analog fashion.