Patents by Inventor Yue Zha

Yue Zha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Spatially programmed logic array architecture
    Patent number: 10963302
    Abstract: A spatially programmed logic circuit (SPLC) array system performs spatial compilation of programs for use in the SPLCs to produce standardized compiled blocks representing predetermined portions of an SPLC. The blocks may be freely relocated in an SPLC after compilation by editing of the compiled file. Inter-block communication circuitry allows joining of blocks within an SPLC or across SPLCs to allow scalability and accommodation of different programs with efficient utilization of an SPLC for multiple programs, again without recompilation.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: March 30, 2021
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Jing Li, Yue Zha
  • Spatially Programmed Logic Array Architecture
    Publication number: 20200301722
    Abstract: A spatially programmed logic circuit (SPLC) array system performs spatial compilation of programs for use in the SPLCs to produce standardized compiled blocks representing predetermined portions of an SPLC. The blocks may be freely relocated in an SPLC after compilation by editing of the compiled file. Inter-block communication circuitry allows joining of blocks within an SPLC or across SPLCs to allow scalability and accommodation of different programs with efficient utilization of an SPLC for multiple programs, again without recompilation.
    Type: Application
    Filed: March 22, 2019
    Publication date: September 24, 2020
    Inventors: Jing Li, Yue Zha