Abstract: Various embodiments of the present application are directed towards a pad with high strength and bondability. In some embodiments, an integrated chip comprises a substrate, an interconnect structure, a pad, and a conductive structure. The interconnect structure adjoins the substrate and comprises wires and vias. The wires and the vias are stacked between the pad and the substrate. The conductive structure (e.g., a wire bond) extends through the substrate to the pad. By arranging the wires and the vias between the pad and the substrate, the pad may be inset into a passivation layer of the interconnect structure and the passivation layer may absorb stress on the pad. Further, the pad may contact the wires and the vias at a top wire level. A thickness of the top wire level may exceed a thickness of other wire levels, whereby the top wire level may be more tolerant to stress.

Abstract: The present application discloses a method for performing a hole-plugging process on a circuit board. The method comprises: forming at least two locating holes on the circuit board; delivering the circuit board to a locating area of a hole-plugging screen printer, and adjusting a moving path of the circuit board in the locating area according to a locating device of the hole-plugging screen printer and the locating holes; and transporting the circuit board to a screen printing area of the hole plugging screen printer automatically according to the moving path, and adjusting a hole-plugging stencil of the hole-plugging screen printer to align an inking point of the hole-plugging stencil with a hole to be plugged on the circuit board, so as to plug ink dropped from the inking point of the hole-plugging stencil into the hole. The present application discloses a system for executing above method.