Patents by Inventor Yueh-Lin Yang

Yueh-Lin Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160106
    Abstract: A lithography method in semiconductor fabrication is provided. The method includes generating a plurality of first drops of a target material through a first nozzle group selected from a plurality of nozzles to form a first elongated droplet; generating a first laser pulse to convert the first elongated droplet into plasma that generates a first extreme ultraviolet (EUV) radiation; reflecting the first EUV radiation by a collector mirror having an optical axis; generating a plurality of second drops of the target material through a second nozzle group selected from the plurality of nozzles to form a second elongated droplet, the second elongated droplet being oblique with the optical axis of the collector mirror at a different angle than the first elongated droplet.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung LIAO, Yueh-Lin YANG
  • Publication number: 20240134293
    Abstract: A semiconductor processing method includes: selecting a target state of a reticle based on a given data set, wherein the given data set comprises temperature profiles of the reticle correlated to a target overlay performance, and the target state is a state in which a deformation of the reticle is substantially unchanged; regulating the reticle to reach the target state; and performing an exposure process on a target workpiece by using the reticle.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Publication number: 20240136213
    Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
  • Patent number: 11914302
    Abstract: A lithography method in semiconductor fabrication is provided. The method includes generating a plurality of drops of a target material through a plurality of nozzles, adjacent two of the plurality of nozzles having a distance less than a width of a first one of the adjacent two of the plurality of nozzles, wherein the plurality of drops are aggregated to an elongated droplet; generating a laser pulse to convert the elongated droplet into plasma that generates an extreme ultraviolet (EUV) radiation; exposing a semiconductor substrate to the EUV radiation.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Yueh-Lin Yang
  • Patent number: 11899377
    Abstract: A semiconductor processing method includes operations. An exposure process is performed on a semiconductor workpiece and includes selecting a target state of a reticle based on given data and regulating the reticle to reach the target state. A development process is performed on the semiconductor workpiece.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Patent number: 11809084
    Abstract: Embodiments described herein provide a lithographic system having two or more lithographic tools connected to a radiation source using two or more variable attenuation units. In some embodiments, the variable attenuation unit reflects a portion of the received light beam to the lithographic tool attached thereto and transmits a remaining portion of the received light beam to the lithographic tools downstream. In some embodiments, the radiation source includes two or more laser sources to provide laser beams with an enhanced power level and which can prevent operation interruption due to laser source maintenances and repair.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: November 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Hung Liao, Yueh Lin Yang
  • Publication number: 20230343628
    Abstract: A method includes emitting, by a first portion of an optical inspection instrument, a radiation toward a supporting surface of a chuck, wherein the chuck is configured for fixing a semiconductor workpiece on the supporting surface, and the optical inspection instrument faces the supporting surface; receiving, by a second portion of the optical inspection instrument, a reflection of the radiation reflected from the chuck; analyzing the reflection of the radiation; determining whether a particle is present on the supporting surface of the chuck based on the analyzing the reflection of the radiation; and removing the particle by using a cleaning tool comprising an exhaust duct.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yueh-Lin YANG, Chi-Hung LIAO
  • Publication number: 20230229044
    Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area is divided to a plurality of fan-out regions, and has interconnects configured to access display elements formed on the display area. The driver area is adjacent to the fan-out area and configured to receive a driver chip having a plurality of pads. The interconnects of the fan-out area include a subset of first interconnects. Each first interconnect passes a first fan-out region and a second fan-out region to access a respective display element. A first portion of the subset of first interconnects is formed on the first fan-out region with a first interconnect pitch, and a second portion of the subset of first interconnects is formed on the second fan-out region with a second interconnect pitch different from the first interconnect pitch.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 20, 2023
    Inventors: You Ben Yin, Quan Yu, Yueh-Lin Yang
  • Patent number: 11676974
    Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.
    Type: Grant
    Filed: September 28, 2021
    Date of Patent: June 13, 2023
    Assignee: PARADE TECHNOLOGIES, LTD.
    Inventors: Yueh-Lin Yang, Haijun Chen, Tatao Hsu, Jonathan Huang
  • Publication number: 20230093409
    Abstract: A method includes detecting a location of a particle on a bottom surface of an electrostatic chuck; moving a platform to a position under the bottom surface of the electrostatic chuck and right under the particle; and rotating the platform about a center of the platform to remove the particle from the bottom surface of the electrostatic chuck.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 23, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yueh-Lin YANG, Chi-Hung LIAO
  • Patent number: 11592715
    Abstract: An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: February 28, 2023
    Assignee: PARADE TECHNOLOGIES, LTD.
    Inventors: Yueh-Lin Yang, Quan Yu, Haijun Chen, Tatao Hsu, Jonathan Huang
  • Publication number: 20220404390
    Abstract: A method includes holding a mask using an electrostatic chuck. The mask includes a substrate having a first bump and a second bump separated from the first bump and a patterned layer. The first bump and the second bump face the electrostatic chuck. The substrate is between the patterned layer and the electrostatic chuck. The first bump and the second bump are spaced apart from the patterned layer. The first bump and the second bump are ring strips in a top view, and the first bump has a rectangular cross section and the second bump has a triangular cross section. The method further includes generating extreme ultraviolet (EUV) radiation using an EUV light source; and directing the EUV radiation toward the mask, such that the EUV radiation is reflected by the mask.
    Type: Application
    Filed: July 29, 2022
    Publication date: December 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung LIAO, Yueh-Lin YANG
  • Publication number: 20220384489
    Abstract: An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects providing electrical accesses to display elements of the display area. The device has a driver chip disposed on the driver area. The driver chip includes a first edge adjacent to the display area and multiple pad groups, each pad group including a respective row of electronic pads that is (i) arranged substantially in parallel with the first edge and (ii) electrically coupled to a respective subset of display elements via respective interconnects routed on a respective region of the fan-out area. The pad groups include a first pad group and a second pad group. The first and second pad groups have two different distances from the first edge and correspond to two different subsets of interconnects routed on two non-overlapping regions of the fan-out area.
    Type: Application
    Filed: September 28, 2021
    Publication date: December 1, 2022
    Inventors: Yueh-Lin Yang, Haijun Chen, Tatao Hsu, Jonathan Huang
  • Publication number: 20220382094
    Abstract: An electronic device has a display screen and a driver chip disposed on a driver area of the display screen. A fan-out area of the display screen has interconnects configured to provide electrical accesses to display elements of the display area. The driver chip includes a first edge, a second edge, and a row of electronic pads proximate to the first edge. The electronic pads have a first subset of end pads at a first end of the first row, a second subset of end pads at a second opposite end of the first row, and a subset of intermediate pads located between the first subset and second subset of end pads. The first subset of end pads physically contact a first subset of interconnects from the first edge, and the subset of intermediate pads physically contact a second subset of interconnects from the one or more second edges.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 1, 2022
    Inventors: Yueh-Lin Yang, Quan Yu, Haijun Chen, Tatao Hsu, Jonathan Huang
  • Patent number: 11508602
    Abstract: A method includes transmitting a radiation toward an electrostatic chuck, receiving a reflection of the radiation, analyzing the reflection of the radiation, determining whether a particle is present on the electrostatic chuck based on the analyzing the reflection of the radiation, and moving a cleaning tool to a location of the particle on the electrostatic chuck when the determination determines that the particle is present.
    Type: Grant
    Filed: July 1, 2021
    Date of Patent: November 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Publication number: 20220357664
    Abstract: Embodiments described herein provide a lithographic system having two or more lithographic tools connected to a radiation source using two or more variable attenuation units. In some embodiments, the variable attenuation unit reflects a portion of the received light beam to the lithographic tool attached thereto and transmits a remaining portion of the received light beam to the lithographic tools downstream. In some embodiments, the radiation source includes two or more laser sources to provide laser beams with an enhanced power level and which can prevent operation interruption due to laser source maintenances and repair.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 10, 2022
    Inventors: Chi-Hung LIAO, Yueh Lin YANG
  • Publication number: 20220319895
    Abstract: A scanner includes a light source configured to apply a light to a backside of a wafer. The light is reflected from the backside of the wafer. A first mirror is configured to receive the light from the backside of the wafer and reflect the light. A sensor is configured to receive the light from the first mirror and generate an output signal indicative of a backside topography of the wafer.
    Type: Application
    Filed: June 17, 2022
    Publication date: October 6, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Mu LIN, Chi-Hung Liao, Yi-Ming Dai, Yueh Lin Yang
  • Patent number: 11448955
    Abstract: A mask includes a substrate, a light-reflecting structure, a patterned layer, and a plurality of bumps. The substrate has a first surface and a second surface. The light-reflecting structure is located on the first surface of the substrate. The patterned layer is located on the light-reflecting structure. The bumps are located on the second surface of the substrate. The bumps define a plurality of voids therebetween and protrude in a direction away from the second surface of the substrate.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: September 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Yueh-Lin Yang
  • Patent number: 11435669
    Abstract: Embodiments described herein provide a lithographic system having two or more lithographic tools connected to a radiation source using two or more variable attenuation units. In some embodiments, the variable attenuation unit reflects a portion of the received light beam to the lithographic tool attached thereto and transmits a remaining portion of the received light beam to the lithographic tools downstream. In some embodiments, the radiation source includes two or more laser sources to provide laser beams with an enhanced power level and which can prevent operation interruption due to laser source maintenances and repair.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: September 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Hung Liao, Yueh Lin Yang
  • Patent number: 11398693
    Abstract: A card edge connector is provided. The card edge connector includes an insulating housing, a terminal module, and a connection bridge. The insulating housing has an insertion surface and an assembling surface, and the insulating housing has an insertion slot recessed in the insertion surface and an accommodating slot that is recessed in the assembling surface. The terminal module includes two plastic cores restricted in position by being linearly slidable with each other and a plurality of conductive terminals that are respectively fixed by the two plastic cores so as to be arranged in two rows. The two plastic cores are received in the accommodating slot. The connection bridge is arranged between the two rows of the conductive terminals. The connection bridge has at least two elastic arms respectively abutted against at least two of the conductive terminals that are respectively fixed by the two plastic cores.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: July 26, 2022
    Assignee: CHIEF LAND ELECTRONIC CO., LTD.
    Inventors: Yueh-Lin Yang, Che-Ting Wu, Guo-Cing Chen