Patents by Inventor Yuh-Wen Lee

Yuh-Wen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130092520
    Abstract: The present disclosure relates to a touch technology, and more particularly to a touch device and a fabrication method thereof. The touch device comprises a sensing area and a peripheral area. The touch device further comprises a sensing electrode layer, a shading layer, a signal transmission line layer, and a conductive layer. The sensing electrode layer extends from the sensing area to the peripheral area. The shading layer is disposed on the peripheral area to overlay the sensing electrode layer and has a through hole to expose a portion of the sensing electrode layer. The signal transmission line layer is disposed on the shading layer and does not cover the through hole. The conductive layer fills the through hole and electrically connects the sensing electrode layer. In addition, a fabrication method of a touch device is also provided.
    Type: Application
    Filed: April 19, 2012
    Publication date: April 18, 2013
    Inventors: Yuh-Wen Lee, Hsiang-Lung Hsia, Yanjun Xie, Feng Chen, Fengming Lin, Xianbin Xu, Keming Ruan
  • Publication number: 20130069887
    Abstract: The present disclosure relates to a touch technology, and more particularly to structure of a touch panel and a manufacturing method thereof. The structure of the touch panel comprises: a sensing layer; and a plurality of surrounding circuits that are disposed in surrounding area of the sensing layer. The surrounding circuits are connected to the sensing layer, wherein the surrounding circuits are made of a transparent conductive material. The transparent conductive material provides good conductivity and reduces visibility of the surrounding circuits, and thus the requirement for a transparent touch panel is met.
    Type: Application
    Filed: May 3, 2012
    Publication date: March 21, 2013
    Inventors: Yuh-Wen LEE, Keming Ruan, Fengming Lin
  • Publication number: 20130069890
    Abstract: The present disclosure relates to a touch display device and a method of manufacturing the same. The touch display device comprises a touch panel, a display module and a first adhesive layer formed by an ultraviolet-curing liquid adhesive, wherein the first adhesive layer laminates the touch panel and the display module. The touch display device further comprises of a lens and a second adhesive layer, wherein the second adhesive layer laminates the touch substrate layer and the lens. The present disclosure overcomes shading effect by curing the first adhesive layer and the second adhesive layer by adjusting the order of laminating the display module with the touch substrate and the lens so as to improve yield of lamination between the touch panel and the display module.
    Type: Application
    Filed: July 26, 2012
    Publication date: March 21, 2013
    Inventors: YUH-WEN LEE, Yau-Chen Jiang, Pingping Huang, Jianxing Luo
  • Publication number: 20130057490
    Abstract: A light guiding liquid glue and a touch sensitive display using the same are provided. The light guiding liquid glue includes a liquid glue and a plurality of light guiding particles dispersed in the liquid glue, wherein volume percent of the light guiding particles in the light guiding liquid glue ranges between 10% and 50%. The light guiding particles have a light scattering property, which can transfer a linear light into a flat light, and therefore the light guiding liquid glue of the present disclosure has a light guiding property. The touch sensitive display includes a display panel and a touch panel.
    Type: Application
    Filed: August 23, 2012
    Publication date: March 7, 2013
    Inventors: YUH-WEN LEE, Qiong Yuan, Xianbin Xu
  • Publication number: 20120249441
    Abstract: The present invention discloses a touch panel and a method of manufacturing a touch panel, to reduce the visibility of the transparent etching line of the transparent electrodes on the touch panel. The touch panel comprises a plurality of transparent electrode disposed distantly on the transparent conductive layer and the passivation layer of a transparent substrate, where the passivation layer covering the transparent conductive layer, to make the refractive index of the passivation layer and the transparent electrodes match with each other. Oxide with high refractive index added in the passivation material is filled in the etched area of the transparent conductive layer, so that the optical refractive index of the etched area and ITO area on transparent conductive layer become closer, and the difference in refractive index curve between ITO area and etched area is reduced, therefore, the effect of making the transparent electrode pattern is achieved.
    Type: Application
    Filed: December 6, 2011
    Publication date: October 4, 2012
    Inventors: YUH-WEN LEE, Ching-Shan Lin, Lichun yang, Fang Fang
  • Publication number: 20120135247
    Abstract: The present invention can achieve the purpose of enhancing the strength and the anti-crack ability of a glass plate. The glass plate includes a transparent glass-based element and a high polymer plastic membrane. The high polymer plastic membrane is framed on at least one part of the peripheral side of the transparent glass-based element and performs a capillary action on at least one part in a liquid state and then to be combined tightly with the transparent glass-based element after being solidified.
    Type: Application
    Filed: July 20, 2011
    Publication date: May 31, 2012
    Inventors: YUH-WEN LEE, Qiong Yuan, Xianbin Xu
  • Publication number: 20110279403
    Abstract: The present invention discloses a capacitive touch panel, comprises a substantially transparent substrate and a transparent sensing pattern. The transparent sensing pattern, which detects touch signals, is formed on the substantially transparent substrate. The transparent sensing pattern comprises a plurality of conductor cells and at least one metal conductor disposed on the substantially transparent substrate. The at least one metal conductor connects two adjacent conductor cells. At least one low-reflection layer is formed on the at least one metal conductor. The low-reflection layer can reduce the reflected light therefore reducing the visibility of the metal conductors.
    Type: Application
    Filed: March 30, 2011
    Publication date: November 17, 2011
    Inventors: YUH-WEN LEE, Ching-Shan Lin
  • Patent number: 7435355
    Abstract: A liquid-based gravity-driven etching-stop technique for controlling structure dimension is provided, where opposite etching trenches in cooperation with an etching-stop solution are used for controlling the dimension of a microstructure on the wafer level. In an embodiment, opposite trenches surrounding the microstructure are respectively etched on sides of the wafer, and the trench depth on the side of the wafer, on which the microstructure is, is equal to the design dimension of the microstructure. Contrarily, it is unnecessary to define the trench depth on the back-side of the chip. In the final step of the fabrication process, when the device is etched, such that the trenches on the sides communicate with each other to separate the microstructure from the whole wafer automatically and thereby shift from the etchant into the etching-stop solution to stop etching.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: October 14, 2008
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Chin Lin, Hui-Ling Chang, Ching-Hsiang Tsai, Chao-Chiun Liang, Gen-Wen Hsieh, Yuh-Wen Lee
  • Patent number: 7397182
    Abstract: The present invention discloses a display module using blue-ray or ultraviolet-ray light sources to excite RGB fluorescent powders to emit light, which comprises a light guide plate, at least one blue-ray or ultraviolet-ray light source, a diffuser plate, a liquid crystal layer and a fluorescent-powder excited layer. The blue-ray or ultraviolet-ray light sources emit a short-wavelength light with the wavelength ranging from 360 to 460 nm; the light guide plate will guide the short-wavelength light to the diffuser plate; the diffuser plate will further diffuse the short-wavelength light; the diffused short-wavelength light will pass through the liquid crystal layer and reach the fluorescent-powder excited layer where the short-wavelength light excites the fluorescent powder to emit light. The excited layer has multiple grids where RGB fluorescent elements are disposed, and each grid has only one single-color fluorescent element.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: July 8, 2008
    Assignee: Arima Optoelectronics Corp.
    Inventors: Chih Ming Hsu, Yuh Wen Lee
  • Publication number: 20070153668
    Abstract: The present invention provides a data storage device that includes a medium capable of recording information, a movable arm above the medium, a carbon nanotube, a driving electrode and a focusing electrode between the driving electrode and the medium. The movable arm has a conductive micro-tip above a first area of the medium and capable of accessing the information recorded in the medium. The carbon nanotube extends from the conductive micro-tip toward a direction of the medium. The driving electrode is between the conductive micro-tip and the medium, providing an opening between the conductive micro-tip and the medium, and is capable of driving electrons from the carbon nanotube toward the direction of the medium. Further, the focusing electrode is between the driving electrode and the medium, providing an opening between the conductive micro-tip and the medium, and is capable of focusing electrons passing through the focusing electrode opening.
    Type: Application
    Filed: November 20, 2006
    Publication date: July 5, 2007
    Inventors: Yuh-Wen Lee, Ching-Hsing Tsai, Ching-Yi Wu
  • Publication number: 20060264058
    Abstract: A liquid-based gravity-driven etching-stop technique for controlling structure dimension is provided, where opposite etching trenches in cooperation with an etching-stop solution are used for controlling the dimension of a microstructure on the wafer level. In an embodiment, opposite trenches surrounding the microstructure are respectively etched on sides of the wafer, and the trench depth on the side of the wafer, on which the microstructure is, is equal to the design dimension of the microstructure. Contrarily, it is unnecessary to define the trench depth on the back-side of the chip. In the final step of the fabrication process, when the device is etched, such that the trenches on the sides communicate with each other to separate the microstructure from the whole wafer automatically and thereby shift from the etchant into the etching-stop solution to stop etching.
    Type: Application
    Filed: October 5, 2005
    Publication date: November 23, 2006
    Inventors: Wei-Chin Lin, Hui-Ling Chang, Ching-Hsiang Tsai, Chao-Chiun Liang, Gen-Wen Hsieh, Yuh-Wen Lee
  • Patent number: 7125795
    Abstract: A fabrication method for microstructures with high aspect ratios uses a CMOS process to form a desired microstructure on a silicon substrate. The steps of forming a contact plug and a via plug of the process are used to form etching channels in insulation layers, polysilicon layers and metal layers, penetrating to the silicon substrate. An etching process is then performed through the etching channel to form the desired microstructure with high aspect ratio.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: October 24, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Nai-Hao Kuo, Kai-Hsiang Yen, Jing-Hung Chiou, Po-Hao Tsai, Yuh-Wen Lee
  • Publication number: 20050150767
    Abstract: The present invention discloses a method for assembling carbon nanotubes and microprobe, which employs the Electrophoresis or Dielectrophoresis principles to drive the carbon nanotubes self-assembling the microprobe under an electric field. The method comprises the steps of: forming at least one microprobe, the microprobe being covered by a conductive layer; exposing the microprobe to a solution having carbon nanotubes spreading therein, the solution being furnished with an electrode; applying a predetermined voltage between the conductive layer and the electrode, making at least one carbon nanotube to move and attach onto the top of the microprobe.
    Type: Application
    Filed: April 2, 2004
    Publication date: July 14, 2005
    Inventors: Hui-Chi Su, Hsin-Chien Huang, Yuh-Wen Lee, Wei-Chin Lin, Hui-Ling Chang
  • Patent number: 6881369
    Abstract: The invention discloses a microelectroforming mold using a preformed metal as the substrate and its fabrication method. Using a preformed metal as the substrate can avoid deformation of the microelectroforming mold due to residual stress in the electroforming metal. The fabrication method disclosed herein includes the steps of: forming a layer of bonding material on a surface of the preformed metal substrate after machining; forming a high aspect ratio photoresist microstructure on surfaces of the metal substrate and the bonding material; putting an electroforming material into the gaps of the photoresist microstructure to form an electroforming metal microstructure; and using a thermal process to bond the metal substrate and the metal micro structure by the bonding material and simultaneously bum off the photoresist microstructure to form a micro-electroforming mold.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: April 19, 2005
    Assignee: Industrial Technology Research Institute
    Inventors: Yuh-Wen Lee, Liang-Yu Yao, Chao-Chiun Liang, Jeng-En Juang, Ching-Yi Wu
  • Publication number: 20050064650
    Abstract: A fabrication method for microstructures with high aspect ratios uses a CMOS process to form a desired microstructure on a silicon substrate. The steps of forming a contact plug and a via plug of the process are used to form etching channels in insulation layers, polysilicon layers and metal layers, penetrating to the silicon substrate. An etching process is then performed through the etching channel to form the desired microstructure with high aspect ratio.
    Type: Application
    Filed: November 22, 2004
    Publication date: March 24, 2005
    Inventors: Nai-Hao Kuo, Kai-Hsiang Yen, Jing-Hung Chiou, Po-Hao Tsai, Yuh-Wen Lee
  • Patent number: 6804443
    Abstract: Test structure and method of step coverage for optical waveguide production are disclosed. It combines the steps of producing the optical waveguide and the testing structure by forming the optical waveguide components on the chip and the test structure in the surrounding areas, so the optical waveguide and the test structure have the same upper covering layer. Etching solution is used for the etch testing of the test structure, and the step coverage of the upper covering layer for the optical waveguide is extrapolated by the etching result.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: October 12, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Hao Tsai, Jing-Hung Chiou, Kai-Hsiang Yen, Wen-Jiun Liu, Yuh-Wen Lee
  • Publication number: 20040125733
    Abstract: A method for read/write data onto a recording medium by using a nano-tip array and a data storage device incorporating the nano-tip array. The nano-tip array is fabricated on a silicon on insulator wafer to form a multiplicity of silicon micro-tips first by a MEMS technique, followed by forming integrally on each one of the multiplicity of silicon micro-tips at least one carbon nanotube extending outwardly away from the one micro-tip. The data storage device further includes an anode with a multiplicity of apertures therein with each apertures corresponding to one of the multiplicity of silicon micro-tips, and a recording medium that has an active surface positioned immediately adjacent to the multiplicity of silicon micro-tips.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Applicant: Industrial Technology Research Institute
    Inventors: Yuh-Wen Lee, Ching-Hsiang Tsai, Ching-Yi Wu
  • Patent number: 6737307
    Abstract: A method for forming amorphous silicon films with low defect density on single crystal silicon substrates and structures formed. The method is carried out by first providing a single crystal silicon substrate, then depositing a buffer layer by a material such as silicon oxide, silicon nitride, silicon carbide or a metal on top of the single crystal silicon substrate. An amorphous silicon film of substantial thickness, i.e. of thicker than 1 &mgr;m, is then deposited on top of the buffer layer achieving a smooth top surface.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: May 18, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Hao Tsai, Nai-Hao Kuo, Wen-Jiun Liu, Yuh-Wen Lee
  • Publication number: 20040081417
    Abstract: Test structure and method of step coverage for optical waveguide production are disclosed. It combines the steps of producing the optical waveguide and the testing structure by forming the optical waveguide components on the chip and the test structure in the surrounding areas, so the optical waveguide and the test structure have the same upper covering layer. Etching solution is used for the etch testing of the test structure, and the step coverage of the upper covering layer for the optical waveguide is extrapolated by the etching result.
    Type: Application
    Filed: June 24, 2003
    Publication date: April 29, 2004
    Inventors: Po-Hao Tsai, Jing-Hung Chiou, Kai-Hsiang Yen, Wen-Jiun Liu, Yuh-Wen Lee
  • Publication number: 20040018720
    Abstract: A fabrication method for microstructures with high aspect ratios is defined using via plugs and contact plugs. An etching channel is shaped as the microstructure is formed. Finally, an isotropic etching process is employed to remove the silicon substrate under the microstructure, thereby making a suspending microstructure with a high aspect ratio. In comparison with the prior art, the invention can save many photolithography steps and can be readily integrated into existing processes. Therefore, one can use the existing IC manufacturing equipment to make suspending microstructures with high aspect ratios.
    Type: Application
    Filed: April 29, 2003
    Publication date: January 29, 2004
    Inventors: Nai-Hao Kuo, Kai-Hsiang Yen, Jing-Hung Chiou, Po-Hao Tsai, Yuh-Wen Lee