Abstract: A gear assembly comprises at least two gears, each of which is formed by injection molding and has a plurality of ribs on their bases. The two gears have a gear ratio of 1:N and a ratio of the number of ribs is 1:M (N and M are integers). Alternatively, the two gears are supported in positions where one of ribs on one gear and one of ribs on the other gear lie on the same line at a predetermined number of times while one of gears rotates once. The two gears can also be supported in positions where the ribs on the two gears have predetermined positional relationships so that the two gears rotate at a constant angular speed.

Abstract: In a semiconductor device, N-type diffusion regions for providing an LDD structure are formed on a P-type substrate. A thick CVD deposited insulating film is formed on both the diffusion regions. A word line layer is formed on this deposited insulating film and a gate oxide film in a direction crossing the diffusion regions. Since the deposited insulating film is set to be thick, a capacity between one of the diffusion regions as a bit line layer and the word line layer is reduced so that a reading speed of the semiconductor device is improved. Further, a punch through proof pressure is increased since the diffusion regions have an LDD structure. Thus, it is possible to provide a planar cell structure which increases the reading speed and is advantageous in a fine structure. Another semiconductor device is also shown. A method for manufacturing the semiconductor device is further shown.

Abstract: Graphite cast iron is diecast at a solid-liquid coexisting state with a mold having a gate opened at an area of not more than 1/10 of a pressurized area of a plunger tip.

Abstract: A semiconductor memory device includes a substrate, a first diffusion region composed of at least one longitudinal and continuous source region which is disposed on the substrate and commonly used for a plurality of memory transistors, and a second diffusion region composed of at least one longitudinal and continuous drain region which is disposed in parallel with the first diffusion region and commonly used for the plurality of memory transistors. A refractory metal film is disposed on each of the first and second diffusion regions. An electric insulation film is disposed on the refractory metal film. A plurality of parallel gate electrodes are disposed crossing over the first and second diffusion regions. And a gate oxide film is arranged to electrically insulate the gate electrodes from the diffusion regions.

Abstract: A semiconductor memory device comprising a substrate, a longitudinal source diffusion layer for a plurality of memory transistor source regions continuously formed on the substrate, and a longitudinal drain diffusion layer for a plurality of memory transistor drain regions continuously formed on the substrate in parallel to the source diffusion layer. A word line is formed crossing over the diffusion layers. And an electrically insulating film is interposed between the word line and the diffusion layers. The insulating film is thicker than a gate oxide film formed between the diffusion layers.

Abstract: A plunger type electromagnet is provided with an attractive plate connected to the plunger, with an improved configuration of plunger and stationary element, or with a flanged tubular member of magnetic material affixed to the axial end of a coiling bobbin, in order to increase the rate of change in the permeance of the magnetic circuit at the time of attractive operation and to enhance the sensitivity of the electromagnet.Furthermore, the surface area of the abutment faces of the stationary and movable elements is calibrated so as to control the attractive and retaining force thereof.In some embodiments, a permanent magnet is provided which is shaped in the form of an annulus and is magnetized in the direction of thickness of the annulus, so as to facilitate magnetization of the permanent magnet, to reduce the number of component parts, and to provide an electromagnet which is compact in size, light in weight, and suitable for mass production.

Abstract: A semiconductor integrated circuit device which comprises a substrate, a first continuous longitudinal diffusion layer formed in the substrate and a second continuous longitudinal diffusion layer constitutes source areas of a plurality of MOS transistors. The second diffusion layer constitutes drain areas of the transistors. The device further comprises a first polycide layer formed on and along each of the first and second diffusion layers in contact therewith and a second polycide layer for constituting a gate electrode of each of the transistors. The second polycide layer is formed on and transversing the first polycide layers in a direction perpendicular to the first and second diffusion layers. An insulation layer is interposed between the first and second polycide layers.